Display panel and method for manufacturing the same

1. A thin film transistor substrate, comprising:

a thin film transistor arranged on a substrate, wherein the thin film transistor comprises a gate electrode, a first insulation film arranged on the gate electrode, an active layer arranged on the first insulation film, a source electrode and a drain electrode arranged on the active layer;

a storage electrode arranged on the substrate;

a second insulation film arranged on the thin film transistor;

a recess formed in the second insulation film; and

a pixel electrode arranged on the second insulation film and the recess, wherein the pixel electrode is connected to the thin film transistor,

wherein a width of the recess is larger than a width of the storage electrode.

2. The thin film transistor substrate of claim 1 , wherein the storage electrode comprises the same material as the gate electrode.

3. The thin film transistor substrate of claim 1 , wherein a width of the recess is about one-hundred one percent (101%) to about one-hundred fifty percent (150%) of a width of the storage electrode.

4. The thin film transistor substrate of claim 1 , further comprising a passivation film between the first insulation film and the second insulation film.

5. The thin film transistor substrate of claim 4 , wherein the recess exposes the passivation film.

6. The thin film transistor substrate of claim 1 , wherein the recess exposes the first insulation film.

7. A display panel, comprising:

a first substrate comprising:

a thin film transistor arranged on the first substrate, wherein the thin film transistor comprises a gate electrode, a first insulation film arranged on the gate electrode, an active layer arranged on the first insulation film, a source electrode and a drain electrode arranged on the active layer; a storage electrode arranged on the substrate;

a second insulation film arranged on the thin film transistor;

a recess formed in the second insulation film; and

a pixel electrode arranged on the second insulation film and the recess, wherein the pixel electrode is connected to the thin film transistor,

a second substrate comprising a common electrode arranged corresponding to the pixel electrode; and

a liquid crystal layer arranged between the first substrate and the second substrate,

wherein a width of the recess is large than a width of the storage electrode.

8. The display panel of claim 7 , wherein the storage electrode comprises the same material as the gate electrode.

9. The display panel of claim 7 , wherein a width of the recess is about one-hundred one percent (101%) to about one-hundred fifty percent (150%) of a width of the storage electrode.

10. The display panel of claim 7 , wherein vertical orientation films are provided on the pixel electrode and the common electrode.

11. The display panel of claim 7 , wherein a passivation film is arranged between the first insulation film and the second insulation film.

12. The display panel of claim 11 , wherein the recess exposes the passivation film.

13. The display panel of claim 7 , wherein the recess exposes the first insulation film.

14. A method for manufacturing a thin film transistor substrate, comprising:

forming a gate electrode and a storage electrode on a substrate;

forming a gate insulation film on the gate electrode and the storage electrode;

forming an active layer on the gate insulation;

forming a source electrode and a drain electrode on the active layer;

forming a protection film on the substrate;

forming a recess; and

forming a pixel electrode on the recess and on the protection film,

wherein forming a recess comprises removing a portion of the protection film having a size larger than a size of the storage electrode in a region corresponding to the storage electrode.

15. The method of claim 14 , wherein forming the storage electrode further comprises:

forming a conductive film on the transparent substrate;

forming a first photoresist mask pattern through a photo-etching process using a first mask having a light transmitting or light shielding region corresponding to a storage electrode region; and

removing a portion of the conductive film using the first photoresist mask pattern to form the storage electrode.

16. The method of claim 14 , wherein forming the recess further comprises:

forming a photoresist on the protection film;

forming a second photoresist mask pattern through a photo-etching process using a second mask having a light transmitting or light shielding region with a size larger than the light transmitting or light shielding region of the first mask; and

removing a portion of the protection film using the second photoresist mask pattern.

17. The thin film transistor substrate of claim 1 , wherein the storage electrode is arranged below a lower surface of the recess.

18. The thin film transistor substrate of claim 1 , wherein the recess is larger than an overlapping area between the storage electrode and the pixel electrode.

19. The thin film transistor substrate of claim 18 , wherein the recess is completely covering an overlapping area between the storage electrode and the pixel electrode.

20. The thin film transistor substrate of claim 1 , wherein a distance between the pixel electrode and the storage electrode is smaller than a distance between the pixel electrode and the gate electrode.

21. The thin film transistor substrate of claim 1 , further comprising a storage electrode line arranged on the substrate, wherein the storage electrode line electrically connects adjacent storage electrodes.

22. The thin film transistor substrate of claim 21 , wherein the storage electrode line is partially overlapped with the recess.