IP Library Granted Patent US 7,615,838
Granted Patent B2
US 7,615,838 · App. 11/851,223 · Granted Nov 10, 2009

CMOS image sensor and method for manufacturing the same

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Quick Facts
Patent No.
US 7,615,838
App. No.
11/851,223
Granted
Nov 10, 2009
Kind
B2
Abstract

A CMOS image sensor and a method for manufacturing the same. In one example embodiment, a CMOS image sensor includes a field region and an active region, a second conductive bottom region, a first conductive well region, a second conductive top region, and a first conductive high concentration region. The field region and the active region are formed in a first conductive semiconductor substrate. The second conductive bottom region has a first depth in part of the active region. The first conductive well region is formed in the active region. The second conductive top region has a depth that is less than the first depth. The first conductive high concentration region has a depth that is less than the depth of the second conductive top region.

Claims (39)

1. A CMOS image sensor comprising:

a field region and an active region both formed in a first conductive semiconductor substrate;

a second conductive bottom region having a first depth in part of the active region;

a first conductive well region formed in the active region and surrounding the second conductive bottom region;

a second conductive top region having a depth that is less than the first depth in the active region; and

a first conductive high concentration region having a depth that is less than the depth of the second conductive top region at a whole surface of the semiconductor substrate comprising the second conductive top region,

wherein the second conductive bottom region is formed by implanting second conductive impurity ions of a concentration higher than a concentration of impurities of the first conductive semiconductor substrate and lower than that of the first conductive well region.

2. The CMOS image sensor of claim 1 , wherein the second conductive top region is formed wider than the second conductive bottom region.

3. The CMOS sensor of claim 1 , wherein the second conductive bottom region is plurally formed narrower than the second conductive to region.

4. The CMOS image sensor of claim 1 , wherein the second conductive top region is formed by implanting second conductive impurity ions of a concentration higher than that of the first conductive well region.

5. A method for manufacturing a CMOS image sensor, the method comprising:

forming both a field region and an active region in a first conductive semiconductor substrate;

forming a second conductive bottom region having a first depth in part of the active region;

forming a first conductive well region to surround the second conductive bottom region in the active region;

forming a second conductive top region having a depth that is less than the first depth in the active region;

implanting first conductive high concentration impurity ions into a whole surface of the semiconductor substrate comprising the second conductive top region; and

forming a first conductive high concentration region having a depth that is less than the depth of the second conductive top region,

wherein the second conductive bottom region is formed by implanting second conductive impurity ions of a concentration higher than a concentration of impurities of the first conductive semiconductor substrate and lower than that of the first conductive well region.

6. The method of claim 5 , wherein the second conductive top region is formed wider than the second conductive bottom region.

7. The method of claim 5 , wherein the second conductive bottom region is formed at an inner and substantially central part of the active region.

8. The method of claim 5 , wherein the second conductive top region is formed by implanting second conductive impurity ions of a concentration higher than that of the first conductive well region.

9. The method of claim 5 , wherein a mask pattern for forming the first conductive well region is the same as a mask pattern for forming the second conductive bottom region but is opposite to the mask patter in polarity.

10. A CMOS image sensor comprising:

a field region and an active region both formed in a first conductive semiconductor substrate;

a second conductive bottom region having a first depth in part of the active region;

a first conductive well region formed in the active region and surrounding the second conductive bottom region;

a second conductive top region having a depth that is less than the first depth in the active region; and

a first conductive high concentration region having a depth that is less than the depth of the second conductive top region at a whole surface of the semiconductor substrate comprising the second conductive top region,

wherein the first and the second conductive region types are P and N type or N and P type, respectively, and

wherein the second conductive top region is sandwiched between the first conductive high concentration region and the first conductive well region.

11. A method for manufacturing a CMOS image sensor, the method comprising:

forming both a field region and an active region in the first conductive semiconductor substrate;

forming a second conductive bottom region having a first depth in part of the active region;

forming a first conductive well region to surround the second conductive bottom region in the active region;

forming a second conductive top region having a depth that is less than the first depth in the active region;

implanting first conductive high concentration impurity ions into a whole surface of the semiconductor substrate comprising the second conductive top region; and

forming a first conductive high concentration region having a depth that is less than the depth of the second conductive top region,

wherein the first and the second conductive region types are P and N type or N and P type, respectively, and

wherein the second conductive top region is sandwiched between the first conductive high concentration region and the first conductive well region.

Assignments (2)
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD.
Reel/Frame 044559/0819 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2007
From: KIM, JONG MIN
To: DONGBU HITEK CO., LTD.
Reel/Frame 019793/0127 →