Wireline transmission circuit

1. A wireline transmission circuit comprising:

a first circuit configured to produce a first variable current;

a second circuit configured to produce a first static current;

a trans-impedance amplifier configured to output a first analog signal at a first output node in response to the first variable cunent and the first static current received at a first input node;

a first feedback resistor connected to the first input node and the first output node; and

a second feedback resistor connected to a second input node and a second output node, wherein the trans-impedance amplifier is further configured to output a second analog signal at the second output node in response to a second variable current and a second static current received at a second input node, wherein a common-mode voltage at the first input nodes is different from a common-mode voltage at the first output nodes by more than 0.1V, and wherein a common-mode voltage at the second input nodes is different from a common-mode voltage at the second output nodes by more than 0.1V.

2. The wireline transmission circuit of claim 1 , wherein the variable current varies in a range between 0 and Full-Scale (FS) and the first static current has an amplitude of about −FS/2.

3. The wireline transmission circuit of claim 1 , wherein the first circuit is configured to produce the first variable current in response to an input signal.

4. The wireline transmission circuit of claim 1 , wherein the first circuit comprises a current steering digital-to-analog converter (DAC) comprising a plurality of current sources that are configured to produce the variable current.

5. The wireline transmission circuit of claim 1 , wherein the second circuit comprises a current steering DAC comprising a plurality of current sources that are configured to produce the first static current.

6. The wireline transmission circuit of claim 1 , wherein the first circuit, the second circuit, and the trans-impedance amplifier are fabricated on a complimentary-metal-oxide semiconductor (CMOS) substrate.

7. The wireline transmission circuit of claim 6 , wherein the first circuit is fabricated by one or more first oxide layers in a CMOS process and the trans-impedance amplifier comprises a transistor fabricated in the CMOS process by a second oxide layer thicker than the one or more first oxide layers.

8. The wireline transmission circuit of claim 1 , wherein the first circuit is further configured to produce the second variable current and the second circuit is further configured to produce a second static current.

9. The wireline transmission circuit of claim 1 , wherein the first variable current varies in a range between 0 and Full-Scale (FS) at the first input node and the second variable current varies in a range between −FS and 0 at the second input node.

10. The wireline transmission circuit of claim 1 , further comprising:

a first common-mode correction circuit (CMCC) configured to inject a first correction current into the first feedback resistor at the first output node and to inject a second correction current into the second feedback resistor at the second output node; and

a second CMCC configured to remove the first correction current at the first input node and to remove the second correction current at the second input node, wherein the common-mode voltage of at least one of the first input node, the second input node, the first output node, and the second output node is determined by the trans-impedance line-driver.

11. The wireline transmission circuit of claim 1 , wherein the common-mode voltages at the first input node and the second input node is provided by a first internal loop within the trans-impedance amplifier; and

the common-mode voltages at the first output node and the second output node is provided by a output internal loop within the trans-impedance amplifier.

12. A wireline transmission circuit, comprising:

a first circuit configured to produce a variable current;

a second circuit configured to produce a first static current and a second static current;

a trans-impedance amplifier configured to output a first analog signal at a first output node in response to the variable current and the first static current received at a first input node, and to output a second analog signal at a second output node in response to the variable current and the second static current received at a second input node;

a first feedback resistor connected to the first input node and the first output node; and

a second feedback resistor connected to the second input node and the second output node, wherein a common-mode voltage at the first input nodes is different from a common-mode voltage at the first output nodes by more than 0.1V, and wherein a common-mode voltage at the second input nodes is different from a common-mode voltage at the second output nodes by more than 0.1V.

13. The wireline transmission circuit of claim 12 , wherein the first circuit is configured to direct the variable current to the first input node or to the second input node.

14. The wireline transmission circuit of claim 12 , wherein the variable current varies in a range between 0 and Full-Scale (FS) at the first input node and varies between FS and 0 at the second input node.

15. The wireline transmission circuit of claim 14 , wherein the first static current is about −FS/2 and the second static current is about FS/2.

16. The wireline transmission circuit of claim 12 , wherein the first circuit comprises a current steering DAC comprising a plurality of current sources that are configured to produce the variable current.

17. The wireline transmission circuit of claim 12 , wherein the second circuit comprises a current steering DAC comprising a plurality of current sources that are configured to produce the first static current and the second static current.

18. The wireline transmission circuit of claim 12 , wherein the first circuit, the second circuit, and the trans-impedance amplifier are fabricated on a complimentary-metal-oxide semiconductor (CMOS) substrate.

19. The wireline transmission circuit of claim 18 , wherein the first circuit is fabricated by one or more first oxide layers in a CMOS process and the trans-impedance amplifier comprises a transistor fabricated in the CMOS process by a second oxide layer thicker than the one or more first oxide layers.

20. The wireline transmission circuit of claim 12 , further comprising:

a first common-mode correction circuit (CMCC) configured to inject a first correction current into the first feedback resistor at the first output node and to inject a second correction current into the second feedback resistor at the second output node; and

a second CMCC configured to remove the first correction current at the first input node and to remove the second correction current at the second input node, wherein the common-mode voltage of at least one of the first input node, the second input node, the first output node, and the second output node is determined by the trans-impedance line-driver.

21. The wireline transmission circuit of claim 12 , wherein the common-mode voltages at the first input node and the second input node is provided by a first internal loop within the trans-impedance amplifier; and

the common-mode voltages at the first output node and the second output node is provided by a output internal loop within the trans-impedance amplifier.

22. A wireline transmission circuit, comprising:

a first circuit configured to produce a variable current and to direct a variable current to a first input node or to a second input node;

a second circuit configured to produce a first static current and a second static current;

a trans-impedance amplifier configured to output a first analog signal at a first output node in response to the variable current and the first static current received at the first input node, and to output a second analog signal at a second output node in response to the variable current and the second static current received at the second input node;

a first feedback resistor connected to the first input node and the first output node;

a second feedback resistor connected to the second input node and the second output node, wherein a common-mode voltage at the first input nodes is different from a common-mode voltage at the first output nodes by more than 0.1V, and wherein a common-mode voltage at the second input nodes is different from a common-mode voltage at the second output nodes by more than 0.1V;

a first common-mode correction circuit (CMCC) configured to inject a first correction current into the first feedback resistor at the first output node and to inject a second correction current into the second feedback resistor at the second output node; and

a second CMCC configured to remove the first correction current at the first input node and to remove the second correction current at the second input node, wherein the common-mode voltage of at least one of the first input node, the second input node, the first output node, and the second output node is determined by the trans-impedance line-driver.

23. The wireline transmission circuit of claim 22 , wherein the variable current varies in a range between 0 and Full-Scale (FS) at the first input node and varies between FS and 0 at the second input node, and wherein the first static current is about −FS/2 and the second static current is about FS/2.

24. The wireline transmission circuit of claim 22 , wherein the first circuit, the second circuit, and the trans-impedance amplifier are fabricated on a complimentary-metal-oxide semiconductor (CMOS) substrate, the first circuit is fabricated by one or more first oxide layers in a CMOS process and the trans-impedance amplifier comprises a transistor fabricated in the CMOS process by a second oxide layer thicker than the one or more first oxide layers.

25. The wireline transmission circuit of claim 22 , wherein first circuit configured to produce the variable current in response to an input signal, and wherein the trans-impedance amplifier is configured to output the first analog signal and the second analog signal to a physical wire, a co-axial cable, a telephone wire, or a power line.