IP Library Granted Patent US 7,733,189
Granted Patent B1
US 7,733,189 · App. 11/855,848 · Granted Jun 8, 2010

Oscillator comprising foldover detection

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Quick Facts
Patent No.
US 7,733,189
App. No.
11/855,848
Granted
Jun 8, 2010
Kind
B1
Abstract

Control circuitry is disclosed including an oscillator operable to generate an oscillator signal. A frequency of the oscillator signal increases as an amplitude of a first voltage increases up to a threshold, and the frequency of the oscillator signal decreases as an amplitude of the first voltage exceeds the threshold. The oscillator is operable to generate a foldover signal indicating when the frequency of the oscillator signal is decreasing due to the first voltage exceeding the threshold.

Claims (32)

1. Control circuitry comprising an oscillator operable to generate an oscillator signal and a foldover detection circuit, wherein:

a frequency of the oscillator signal increases as an amplitude of a first voltage increases up to a threshold;

the frequency of the oscillator signal decreases as an amplitude of the first voltage exceeds the threshold; and

the foldover detection circuit is operable to generate a foldover signal indicating when the frequency of the oscillator signal is decreasing due to the first voltage exceeding the threshold.

2. The control circuitry as recited in claim 1 , wherein the oscillator comprises:

a first ring oscillator operable to generate a first oscillating signal in response to the first voltage; and

a second ring oscillator operable to generate a second oscillating signal in response to a second voltage less than the first voltage.

3. The control circuitry as recited in claim 2 , wherein the foldover detection circuit generates the foldover signal by comparing the first oscillating signal to the second oscillating signal.

4. The control circuitry as recited in claim 3 , wherein the foldover detection circuit generates the foldover signal by comparing a cycle of the first oscillating signal to a cycle of the second oscillating signal.

5. The control circuitry as recited in claim 1 , wherein the oscillator comprises:

a first ring oscillator comprising a first number of inverters; and

a second ring oscillator comprising a second number inverters less than the first number of inverters.

6. The control circuitry as recited in claim 1 , further comprising a switching voltage regulator for regulating a voltage supplied to system circuitry, wherein:

the oscillator signal represents a gate speed of a reference circuit in the system circuitry; and

the switching voltage regulator comprises switching circuitry operable to charge a charging element in response to the oscillator signal and the foldover signal.

7. The control circuitry as recited in claim 1 , further comprising a difference circuit for generating an error signal representing a difference between the oscillator signal and a reference frequency.

8. The control circuitry as recited in claim 7 , further comprising:

an integrator for integrating the error signal to generate a control signal; and

a voltage regulator for adjusting a supply voltage in response to the control signal.

9. The control circuitry as recited in claim 8 , wherein the foldover signal disables the control signal.

10. A method of generating an oscillator signal, wherein a frequency of the oscillator signal increases as an amplitude of a first voltage increases up to a threshold, and the frequency of the oscillator signal decreases as an amplitude of the first voltage exceeds the threshold, the method comprising generating a foldover signal indicating when the frequency of the oscillator signal decreasing due to the first voltage exceeding the threshold is detected.

11. The method as recited in claim 10 , further comprising:

generating a first oscillating signal in response to the first voltage; and

generating a second oscillating signal in response to a second voltage less than the first voltage.

12. The method as recited in claim 11 , generating the foldover signal comprises comparing the first oscillating signal to the second oscillating signal.

13. The method as recited in claim 12 , wherein generating the foldover signal comprises comparing a cycle of the first oscillating signal to a cycle of the second oscillating signal.

14. The method as recited in claim 10 , wherein the oscillator signal represents a gate speed of a reference circuit in system circuitry, the method further comprising charging a charging element of a switching voltage regulator in response to the oscillator signal and the foldover signal to regulate a supply voltage.

15. The method as recited in claim 10 , further comprising generating an error signal representing a difference between the oscillator signal and a reference frequency.

16. The method as recited in claim 15 , further comprising:

integrating the error signal to generate a control signal; and

adjusting a supply voltage in response to the control signal.

17. The method as recited in claim 16 , further comprising disabling the control signal in response to the foldover signal.

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2007
From: BENNETT, GEORGE J.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 019830/0187 →