IP Library Patent Application 11863662
Patent Application
App. No. 11/863,662

MULTIMEDIA SOC WITH ADVANCED JACK SENSE APPLICATIONS

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Patent No.
US None
App. No.
11/863,662
Abstract

In a multimedia SOC that includes a plurality of jack sense modules coupled to the plurality of video output pins, a processing module functions to: enable one or more of the plurality of jack sense modules to determine a video connection to the SOC, enable a video decoder in a first mode when the video connection is of a first type, and enable the video decoder in a second mode when the video connection is of a second type

Claims (93)

1 . A system on a chip (SOC) comprises:

a bus structure;

a processing module coupled to the bus structure;

read only memory (ROM) coupled to the bus structure;

random access memory (RAM) coupled to the bus structure;

an external memory interface coupled to the bus structure;

an analog to digital conversion (ADC) module coupled to the bus structure;

an audio digital to analog conversion (DAC) module coupled to the bus structure;

a video decoder coupled to the bus structure;

a plurality of video DAC modules coupled to at least one of the video decoder and the bus structure;

a plurality of video output pins coupled to corresponding outputs of the plurality of video DAC modules;

a plurality of jack sense modules coupled to the plurality of video output pins, wherein the processing module functions to:

enable one or more of the plurality of jack sense modules to determine a video connection to the SOC;

enable the video decoder in a first mode when the video connection is of a first type; and

enable the video decoder in a second mode when the video connection is of a second type.

2 . The SOC of claim 1 , wherein the process module further functions to:

enable the video decoder in a third mode when the video connection is of a third type.

3 . The SOC of claim 2 comprises:

the first type of video connection corresponding to composite video;

the second type of video connection corresponding to component video; and

the third type of video connection corresponding to S-video.

4 . The SOC of claim 1 , wherein the processing module further functions to:

disable the video decoder when a null video connection is detected.

5 . The SOC of claim 1 , wherein the processing module further functions to:

disable the plurality of video DAC modules when a null video connection is detected.

6 . The SOC of claim 1 , wherein the processing module further functions to:

enable one of the plurality of video DAC modules when the first type of video connection is detected; and

enable more than one of the plurality of video DAC modules when the second type of video connection is detected.

7 . The SOC of claim 6 , wherein the processing module further functions to:

enable the one of the plurality of video DAC modules when a composite video connection is detected;

enable at least two of the plurality of video DAC modules when an S-video connection is detected; and

enable at least three of the plurality of video DAC modules when a component video connection is detected.

8 . The SOC of claim 1 , wherein a jack sense module of the plurality of jack sense modules comprises:

a switch;

a pull up resistor coupled to the switch and a corresponding one of the plurality of video output pins; and

a circuit coupled to the pull up resistor, wherein, when a video cable is coupled to the corresponding one of the plurality of video output pins, the circuit provides a first output and when a video cable is not coupled to the corresponding one of the plurality of video output pins, the circuit provides a second output.

9 . The SOC of claim 8 , wherein the jack sense module further comprises at least one of:

a disconnect detector coupled to determine when the video cable has been disconnected; and

an impedance detector coupled to determine whether impedance of the video cable being coupled to the corresponding one of the plurality of video output pins corresponds to an impedance of a video connection and when the impedance of the video cable being coupled to the corresponding one of the plurality of video output pins corresponds to an impedance of a video connection, indicating a proper connection.

10 . A system on a chip (SOC) comprises:

a bus structure;

a processing module coupled to the bus structure;

read only memory (ROM) coupled to the bus structure;

random access memory (RAM) coupled to the bus structure;

an external memory interface coupled to the bus structure;

an analog to digital conversion (ADC) module coupled to the bus structure;

an audio digital to analog conversion (DAC) module coupled to the bus structure;

a video decoder coupled to the bus structure;

a plurality of video DAC modules coupled to at least one of the video decoder and the bus structure;

a plurality of video output pins coupled to corresponding outputs of the plurality of video DAC modules;

a plurality of jack sense modules coupled to the plurality of video output pins, wherein the processing module functions to:

enable one or more of the plurality of jack sense modules to determine a video connection to the SOC;

enable one of the plurality of video DAC modules when the video connection is of a first type; and

enable more than one of the plurality of video DAC modules when the video connection is of a second type.

11 . The SOC of claim 10 , wherein the processing module further functions to:

enable the one of the plurality of video DAC modules when a composite video connection is detected;

enable at least two of the plurality of video DAC modules when an S-video connection is detected; and

enable at least three of the plurality of video DAC modules when a component video connection is detected.

12 . The SOC of claim 11 , wherein the processing module further functions to:

disable the plurality of video DAC modules when a null video connection is detected.

13 . The SOC of claim 10 , wherein the processing module further functions to:

enable the video decoder in a first mode when the video connection is of the first type; and

enable the video decoder in a second mode when the video connection is of the second type.

14 . The SOC of claim 13 , wherein the process module further functions to:

enable the video decoder in a third mode when the video connection is of a third type.

15 . The SOC of claim 14 comprises:

the first type of video connection corresponding to composite video;

the second type of video connection corresponding to component video; and

the third type of video connection corresponding to S-video.

16 . The SOC of claim 13 , wherein the processing module further functions to:

disable the video decoder when a null video connection is detected.

17 . The SOC of claim 10 , wherein a jack sense module of the plurality of jack sense modules comprises:

a switch;

a pull up resistor coupled to the switch and a corresponding one of the plurality of video output pins; and

a circuit coupled to the pull up resistor, wherein, when a video cable is coupled to the corresponding one of the plurality of video output pins, the circuit provides a first output and when a video cable is not coupled to the corresponding one of the plurality of video output pins, the circuit provides a second output.

18 . The SOC of claim 17 , wherein the jack sense module further comprises at least one of:

a disconnect detector coupled to determine when the video cable has been disconnected; and

an impedance detector coupled to determine whether impedance of the video cable being coupled to the corresponding one of the plurality of video output pins corresponds to an impedance of a video connection and when the impedance of the video cable being coupled to the corresponding one of the plurality of video output pins corresponds to an impedance of a video connection, indicating a proper connection.

19 . An integrated circuit (IC) comprises:

a plurality of video DAC modules;

a plurality of video output pins coupled to corresponding outputs of the plurality of video DAC modules; and

a plurality of jack sense modules coupled to the plurality of video output pins, wherein when one of the plurality of jack sense modules determines a video connection to the IC, a corresponding one of the plurality of video DAC modules is enabled and when more that one of the plurality of jack sense modules determines a video connection to the IC, a corresponding number of the plurality of video DAC modules is enabled.

20 . The IC of claim 19 further comprises:

when the one of the plurality of jack sense modules determines that the video connection is a composite video connection, the corresponding one of the plurality of video DAC modules is enabled to support the composite video connection;

when the more that one of the plurality of jack sense modules determines that the video connection is an S-video connection, two of the plurality of video DAC modules are enabled to support the S-video connection; and

when the more that one of the plurality of jack sense modules determines that the video connection is a component video connection, three of the plurality of video DAC modules are enabled to support the composite video connection.

21 . The IC of claim 19 , wherein a jack sense module of the plurality of jack sense modules comprises:

a switch;

a pull up resistor coupled to the switch and a corresponding one of the plurality of video output pins; and

a circuit coupled to the pull up resistor, wherein, when a video cable is coupled to the corresponding one of the plurality of video output pins, the circuit provides a first output and when a video cable is not coupled to the corresponding one of the plurality of video output pins, the circuit provides a second output.

22 . The IC of claim 21 , wherein the jack sense module further comprises at least one of:

a disconnect detector coupled to determine when the video cable has been disconnected; and

an impedance detector coupled to determine whether impedance of the video cable being coupled to the corresponding one of the plurality of video output pins corresponds to an impedance of a video connection and when the impedance of the video cable being coupled to the corresponding one of the plurality of video output pins corresponds to an impedance of a video connection, indicating a proper connection.

Assignments (12)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 037354 FRAME: 0773. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT RELEASE. Recorded Aug 15, 2016
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, LLC
Reel/Frame 039723/0777 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0734 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0773 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037355/0838 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded May 10, 2010
From: SIGMATEL, LLC
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 024358/0439 →
SECURITY AGREEMENT Recorded Mar 16, 2010
From: SIGMATEL, LLC
To: CITIBANK, N.A.
Reel/Frame 024079/0406 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded Jul 9, 2008
From: SIGMATEL, INC.
To: CITIBANK, N.A.
Reel/Frame 021212/0372 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2007
From: FELDER, MATTHEW D.
To: SIGMATEL, INC.
Reel/Frame 019897/0848 →