Method and system for blocker and/or leakage signal rejection by DC bias cancellation
View Patent ↗Methods and systems for blocker and/or leakage signal rejection by DC bias cancellation are disclosed and may include undersampling a received signal including a desired signal and an undesired signal. A biasing current in the wireless system may be utilized to reduce a measured DC signal generated by the undersampling of the received signal. The received signal may be undersampled at a frequency of or an integer sub-harmonic of the undesired signal, which may include a leakage signal and/or a blocker signal. The DC biasing current may be controlled utilizing successive approximation, control logic and a digital to analog converter. The output DC voltage may correspond to said undesired signal, and the received signal may be undersampled utilizing a mixer.
1. A method for wireless communication, the method comprising:
in a wireless system:
receiving an input signal comprising a desired signal and an undesired signal, said undesired signal comprising a blacker signal from another wireless system;
undersampling said input signal, utilizing a sample and hold circuit, at a sampling frequency determined based on a frequency of said undesired signal;
measuring a DC voltage at an output of said sample and hold circuit;
generating a control signal at an output of a digital to analog converter based on said DC voltage; and
adjusting a bias current to mitigate said DC voltage by applying said control signal to a first terminal of a resistor, a second terminal of said resistor connected to said output of said sample and hold circuit.
2. The method according to claim 1 , wherein said sampling frequency is said frequency of said undesired signal.
3. The method according to claim 1 , wherein said sampling frequency is an integer sub-harmonic of said frequency of said undesired signal.
4. The method according to claim 1 , wherein said undesired signal comprises a leakage signal.
5. The method according to claim 1 , wherein said adjusting said bias current is performed utilizing successive approximation.
6. The method according to claim 1 , wherein said generating said control signal is performed utilizing a control logic block.
7. The method according to claim 1 , wherein said DC voltage corresponds to said undesired signal.
8. A system for wireless communication, the system comprising:
one or more circuits for use in a wireless system, wherein said one or more circuits are operable to:
receive an input signal comprising a desired signal and an undesirable signal, said undesired signal comprising a blocker signal from another wireless system;
undersample said input signal, utilizing a sample and hold circuit, at a sampling frequency determined based on a frequency of said undesired signal;
measure a DC voltage at an output of said sample and hold circuit;
generate a control signal at an output of a digital to analog converter based on said DC voltage; and
adjust a bias current to mitigate said DC voltage by applying said control signal to a first terminal of a resistor, a second terminal of said resistor connected to said output of said sample and hold circuit.
9. The system according to claim 8 , wherein said sampling frequency is said frequency of said undesired signal.
10. The system according to claim 8 , wherein said sampling frequency is an integer sub-harmonic of said frequency of said undesired signal.
11. The system according to claim 8 , wherein said undesired signal comprises a leakage signal.
12. The system according to claim 8 , wherein said one or more circuits adjust said bias current utilizing successive approximation.
13. The system according to claim 8 , wherein said one or more circuits adjust said bias current utilizing a control logic block.
14. The system according to claim 8 , wherein said DC voltage corresponds to said undesired signal.