Electrical isolation of monolithic circuits using a conductive through-hole in the substrate

1. A monolithic electronic chip comprising:

a substrate including:

first and second opposing surfaces;

a first circuit having a first end disposed on at least one of the first or second opposing surfaces;

a second circuit having a second end disposed on at least one of the first or second opposing surfaces; and

at least two through-holes extending from the first surface to the second surface and positioned between the first and second ends;

the at least two through-holes positioned so that the through-holes do not touch the first, second, or any other circuit;

at least two conductive impedance taps, each conductive impedance tap formed within one of the at least two through-holes in the substrate and electrically coupled to a reference voltage;

wherein:

a first impedance value between the first circuit and the at least two conductive impedance taps via the substrate is less than a first-second crosstalk impedance value between the first circuit and the second circuit via the substrate;

a second impedance value between the second circuit and the at least two conductive impedance taps via the substrate is less than the first-second crosstalk impedance value, and

the first and second circuits are disposed in a monolithic semiconductor chip.

2. A monolithic electronic chip according to claim 1 , wherein the substrate includes at least one of an n-type semiconductor material or a p-type semiconductor material.

3. A monolithic electronic chip according to claim 1 , further comprises a third circuit, wherein:

the substrate further includes a third circuit disposed on at least one of the first or second opposing surfaces;

the first impedance value is less than a first-third crosstalk impedance value between the first circuit and the third circuit via the substrate;

the second impedance value is less than a second-third crosstalk impedance value between the second circuit and the third circuit via the substrate;

a third impedance value between the third circuit and the at least one conductive impedance tap is less than the first-third crosstalk impedance value; and

the third impedance value is less than the second-third crosstalk impedance value.

4. A monolithic electronic chip according to claim 1 , wherein the at least two through-holes are located on a boundary between the first circuit and the second circuit on the substrate.

5. A monolithic electronic chip according to claim 1 , wherein:

the at least two through-holes are a plurality of through-holes; and

the at least two conductive impedance taps are a plurality of conductive impedance taps.

6. A monolithic electronic chip according to claim 5 , wherein the plurality of through-holes are substantially evenly spaced along a boundary between the first circuit and the second circuit on the substrate.

7. A monolithic electronic chip according to claim 5 , wherein the plurality of through-holes are arranged such that the plurality of conductive impedance taps form a two-dimensional Faraday cage around the first circuit.

8. A monolithic electronic chip according to claim 1 , wherein each through-hole of the substrate has a substantially cylindrical shape.

9. A monolithic electronic chip according to claim 1 , wherein:

the first circuit is disposed on the first opposing surface; and

the second circuit is disposed on the first opposing surface.

10. A monolithic electronic chip according to claim 1 , wherein the first circuit is one of:

a radio frequency (RF) circuit;

an RF detection circuit;

a microwave circuit;

a microwave detection circuit;

a digital baseband circuit;

a logic circuit; or

a signal processing circuit.

11. A monolithic electronic chip according to claim 1 , wherein the at least two conductive impedance taps are formed of a metal.

12. A monolithic electronic chip according to claim 1 , wherein each conductive impedance tap fills the one through-hole in the substrate in which the conductive impedance tap is formed.

13. A monolithic electronic chip according to claim 1 , wherein the reference voltage is a ground reference.