IP Library Granted Patent US 7,873,342
Granted Patent B2
US 7,873,342 · App. 11/871,008 · Granted Jan 18, 2011

Low IF receiver of rejecting image signal and image signal rejection method

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Quick Facts
Patent No.
US 7,873,342
App. No.
11/871,008
Granted
Jan 18, 2011
Kind
B2
Abstract

Provided are an image signal rejection method capable of avoiding demodulation of an image signal along with a real signal in a radio frequency (RF) signal and a low IF receiver of rejecting an image signal by using the method. The low IF receiver of rejecting an image signal includes a low noise amplifier, a quadrature I/Q mixer, a signal complex filter, and a phase and gain control block. The low noise amplifier amplifies a radio frequency (RF) signal. The quadrature I/Q mixer generates an I signal and a Q signal by down-converting the amplified RF signal into an IF signal. The phase and gain control block generates an I′ signal and a Q′ signal which are obtained by changing phases and amplitudes of the I signal and the Q signal by using a real signal. The signal complex filter minimizing the image signal in the IF signal and passing the real signal by performing filtering on the I′ signal and the Q′ signal.

Claims (60)

1. A low IF (intermediate frequency) receiver of rejecting an image signal, comprising:

a low noise amplifier amplifying a radio frequency (RF) signal:

a quadrature I/Q mixer generating an I signal and a Q signal by down-converting the amplified RF signal into an IF signal;

a phase and gain control block generating an I′ signal and a Q′ signal which are obtained by changing phases and amplitudes of the I signal and the Q signal by using a real signal; and

a signal complex filter minimizing the image signal in the IF signal and passing the real signal by performing filtering on the I′ signal and the Q′ signal;

wherein the phase and gain control block comprises:

a phase and gain control circuit generating the I′ signal and the Q′ signal which are obtained by changing the phases and gains of the I signal and the Q signal in response to a phase control signal used for controlling a phase and a gain control signal used for controlling a gain; and

a control signal generation circuit generating the phase control signal and the gain control signal by using the I′ signal, the Q′ signal, and the real signal output from signal complex filter;

wherein the phase and gain control circuit comprises:

an I signal control circuit outputting the I′ signal by controlling the phase and the gain of the I signal in response to the phase control signal and the gain control signal; and

a Q signal control circuit outputting the Q′ signal by controlling the phase and the gain of the Q signal in response to the phase control signal and the gain control signal;

wherein the I signal control circuit comprises:

a first operation amplifier including a positive input terminal applied with the I signal and a negative input terminal applied with a reference voltage;

a first variable resistor which is connected between the positive input terminal and an output terminal of the first operation amplifier and has a resistance that is changed in response to the gain control signal; and

a first variable capacitor which is connected between the positive input terminal and the output terminal of the first operation amplifier and has a capacitance that is changed in response to the phase control signal, and

wherein the Q signal control circuit comprises:

a second operation amplifier including a positive input terminal applied with the Q signal and a negative input terminal applied with the reference voltage;

a second variable resistor which is connected between the positive input terminal and an output terminal of the second operation amplifier and has a resistance that is changed in response to the gain control signal; and

a second variable capacitor which is connected between the positive input terminal and the output terminal of the second operation amplifier and has a capacitance that is changed in response to the phase control signal.

2. A low IF (intermediate frequency) receiver of rejecting an image signal, comprising:

a low noise amplifier amplifying a radio frequency (RF) signal;

a quadrature I/Q mixer generating an I signal and a Q signal by down-converting the amplified RF signal into an IF signal;

a phase and gain control block generating an I′ signal and a Q′ signal which are obtained by changing phases and amplitudes of the I signal and the Q signal by using a real signal; and

a signal complex filter minimizing the image signal in the IF signal and passing the real signal by performing filtering on the I′ signal and the Q′ signal;

wherein the phase and gain control block comprises:

a phase and gain control circuit generating the I′ signal and the Q′ signal which are obtained by changing the phases and gains of the I signal and the Q signal in response to a phase control signal used for controlling a phase and a gain control signal used for controlling a gain; and

a control signal generation circuit generating the phase control signal and the gain control signal by using the I′ signal, the Q′ signal, and the real signal output from signal complex filter;

wherein the phase and gain control circuit comprises:

an I signal control circuit outputting the I′ signal by controlling the phase and the gain of the I signal in response to the phase control signal and the gain control signal; and

a Q signal control circuit outputting the Q′ signal by controlling the phase and the gain of the Q signal in response to the phase control signal and the gain control signal;

wherein the I signal control circuit comprises:

a first operation amplifier including a positive input terminal applied with a first I signal and a negative input terminal applied with a second I signal;

a first variable resistor which is connected between the positive input terminal and a first output terminal of the first operation amplifier and has a resistance that is changed in response to the gain control signal;

a second variable resistor which is connected between the negative input terminal and a second output terminal of the first operation amplifier and has a resistance that is changed in response to the gain control signal;

a first variable capacitor which is connected between the positive input terminal and the first output terminal of the first operation amplifier and has a capacitance that is changed in response to the phase control signal; and

a second variable capacitor which is connected between the negative input terminal and the second output terminal of the first operation amplifier and has a capacitance that is changed in response to the phase control signal, and

wherein the Q signal control circuit comprises:

a second operation amplifier including a positive input terminal applied with a first Q signal and a negative input terminal applied with a second Q signal;

a third variable resistor which is connected between the positive input terminal and a first output terminal of the second operation amplifier and has a resistance that is changed in response to the gain control signal;

a fourth variable resistor which is connected between the negative input terminal and a second output terminal of the second operation amplifier and has a resistance that is changed in response to the gain control signal;

a third variable capacitor which is connected between the positive input terminal and the first output terminal of the second operation amplifier and has a capacitance that is changed in response to the phase control signal; and

a fourth variable capacitor which is connected between the negative input terminal and the second output terminal of the second operation amplifier and has a capacitance that is changed in response to the phase control signal.

3. A low IF (intermediate frequency) receiver of rejecting an image signal, comprising:

a low noise amplifier amplifying a radio frequency (RF) signal;

a quadrature I/Q mixer generating an I signal and a Q signal by down-converting the amplified RF signal into an IF signal;

a phase and gain control block generating an I′ signal and a Q′ signal which are obtained by changing phases and amplitudes of the I signal and the Q signal by using a real signal; and

a signal complex filter minimizing the image signal in the IF signal and passing the real signal by performing filtering on the I′ signal and the Q′ signal;

wherein the phase and gain control block comprises:

a phase and gain control circuit generating the I′ signal and the Q′ signal which are obtained by changing the phases and gains of the I signal and the Q signal in response to a phase control signal used for controlling a phase and a gain control signal used for controlling a gain; and

a control signal generation circuit generating the phase control signal and the gain control signal by using the I′ signal, the Q′ signal, and the real signal output from signal complex filter;

wherein the control signal generation circuit comprises:

an image complex filter outputting an image signal in the RF signal by performing filtering on the I′ signal and the Q′ signal;

a real signal power detector outputting a real power signal corresponding to power of the real signal;

an image signal power detector outputting an image power signal corresponding to power of the image signal;

a signal comparator outputting a comparison signal corresponding to a difference between the power of the real power signal and the image power signal; and

a phase and gain control signal generator outputting the phase control signal and the gain control signal in response to the comparison signal.

4. The low IF receiver of claim 3 , wherein the real power signal and the image power signal are digital signals or analog signals reflecting the amplitudes of the phase control signal and the gain control signal.

5. The low IF receiver of claim 3 , wherein the signal comparator outputs the comparison signal so that the phase and the amplitude of one of the real power signal and the image power signal are not changed and the phase and the amplitude of the other one thereof are changed.

6. The low IF receiver of claim 5 , wherein the phase and gain control signal generator firstly outputs the gain control signal to control gains of the I signal control circuit and the Q signal control circuit and then outputs the phase control signal to control the phases of the I signal control circuit and the Q signal control circuit.

7. The low IF receiver of claim 3 , wherein the signal comparator detects a time point when a difference between the real power signal and the image power signal is maximized and stores a comparison signal corresponding to the detected time point.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2020
From: FCI INC.
To: DIALOG SEMICONDUCTOR KOREA INC.
Reel/Frame 053702/0013 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2007
From: LIM, KYOO HYUN; MIN, SUN KI
To: FCI INC.
Reel/Frame 019950/0407 →