IP Library Granted Patent US 7,994,066
Granted Patent B1
US 7,994,066 · App. 11/871,987 · Granted Aug 9, 2011

Si surface cleaning for semiconductor circuits

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Quick Facts
Patent No.
US 7,994,066
App. No.
11/871,987
Granted
Aug 9, 2011
Kind
B1
Abstract

A method is disclosed for the cleaning of a Si surface at low temperatures. Oxide on the Si surface is brought into contact with Ge, which then sublimates off the surface. The Ge contamination remaining after the oxide removal is cleared away by an exposure to an alkali halide. The disclosed cleaning method may by used in semiconductor circuit fabrication for preparing surfaces ahead of epitaxial growth.

Claims (29)

1. A method for cleaning a Si surface, the method comprising:

providing the Si surface, wherein the Si surface is at least partially covered by an oxide;

supplying Ge to contact the oxide at a first temperature of between about 450° C. and about 750° C. in such manner that Ge build-up takes place on the Si surface; and

exposing the Si surface to a halide together with a carrier gas at a second temperature of between about 450° C. and 650° C., wherein at least a portion of the exposing is carried out without concomitantly supplying Ge.

2. The method of claim 1 , wherein the supplying of Ge is followed by a thermal annealing at a third temperature of between about 450° C. and about 750° C.

3. The method of claim 1 , wherein the exposing to the halide is carried out by supplying hydrogen chloride (HCl) gas together with hydrogen (H 2 ) for the carrier gas, and selecting a HCl to H 2 flow ratio of between about 10 −2 and about 1.

4. The method of claim 3 , wherein the exposing to the HCl has a duration of between about 5 seconds and about 60 seconds.

5. The method of claim 1 , wherein the method further comprises repeating the supplying of Ge and the exposing to the halide steps until the Si surface reaches a predetermined state of cleanness.

6. The method of claim 1 , wherein the providing the Si surface comprises wet etching the Si surface with a solution comprising hydrogen fluoride (HF).

7. The method of claim 1 , wherein the providing the Si surface comprises growing an oxide on the Si surface, and selecting the oxide thickness to be less than about 1 nm.

8. The method of claim 1 , wherein the supplying of Ge is carried out by supplying germane (GeH 4 ) gas together with hydrogen (H 2 ) 4 and selecting a GeH 4 to H 2 flow ratio of between about 10 −3 and about 10 −4 .

9. The method of claim 1 , wherein supplying of Ge is carried out by supplying germane (GeH 4 ) gas together with nitrogen (N 2 ).

10. The method of claim 1 , wherein the supplying of Ge is carried out by supplying Ge 2 H 6 gas.

11. The method of claim 1 , wherein the supplying of Ge is carried out by supplying (GeH 3 )CH 3 gas.

12. The method of claim 1 , wherein the supplying of Ge is carried out by supplying elemental Ge.

13. A method for fabricating a semiconductor circuit, the method comprising:

defining at least one region of the semiconductor circuit for an epitaxial deposition onto a Si surface;

ensuring that coverage over the Si surface consists essentially of an oxide;

supplying Ge to contact the oxide at a first temperature of between about 450° C. and about 750° C. in such manner that Ge build-up takes place on the Si surface;

exposing the Si surface to a halide together with a carrier gas at a second temperature of between about 450° C. and 650° C., wherein at least a portion of the exposing is carried out without concomitantly supplying Ge; and

performing the epitaxial deposition onto the least one region.

14. The method of claim 13 , wherein the semiconductor circuit is characterized as being a CMOS circuit comprising FET devices, and the method further comprises processing the FET devices up to a predetermined state of completion before carrying out the step of defining the at least one region of the semiconductor circuit for the epitaxial deposition onto the Si surface.

15. The method of claim 14 , wherein the predetermined state of completion includes silicide formation for the FET devices.

16. The method of claim 13 , wherein the exposing to the halide is carried out by supplying hydrogen chloride (HCl) gas together with hydrogen (H 2 ) for the carrier gas, and selecting a HCl to H 2 flow ratio of between about 10 −2 and about 1.

17. The method of claim 13 , wherein the method further comprises repeating the supplying of Ge and the exposing to the halide steps until the Si surface is sufficiently clean to receive the epitaxial deposition.

18. The method of claim 13 , wherein in performing the epitaxial deposition Si 1-x Ge x is selected for deposition, with “x” having a range of 0≦x≦1.

19. The method of claim 13 , wherein performing the ensuring step comprises wet etching the Si surface with a solution comprising hydrogen fluoride (HF).

20. The method of claim 13 , wherein performing the ensuring step comprises growing an oxide on the Si surface, and selecting the oxide thickness to be less than about 1 nm.

21. The method of claim 13 , wherein the supplying of Ge is carried out by supplying germane (GeH 4 ) gas together with hydrogen (H 2 ), and selecting a GeH 4 to H 2 flow ratio of between about 10 −3 and about 10 −1 .

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 058979 FRAME: 0027. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 24, 2022
From: LUXTERA LLC
To: CISCO TECHNOLOGY, INC.
Reel/Frame 059496/0803 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2022
From: CISCO SYSTEMS, INC.
To: CISCO TECHNOLOGY, INC.
Reel/Frame 058979/0027 →
RELEASE OF SECURITY INTEREST Recorded Dec 24, 2020
From: SILICON VALLEY BANK
To: LUXTERA, LLC
Reel/Frame 054855/0838 →
CHANGE OF NAME Recorded Feb 6, 2020
From: LUXTERA, INC.
To: LUXTERA LLC
Reel/Frame 052019/0811 →
SECURITY INTEREST Recorded Mar 29, 2017
From: LUXTERA, INC.
To: SILICON VALLEY BANK
Reel/Frame 042109/0140 →
SECURITY AGREEMENT Recorded Mar 17, 2010
From: LUXTERA, INC.
To: SILICON VALLEY BANK
Reel/Frame 024091/0191 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2007
From: CAPELLINI, GIOVANNI; MASINI, GIANLORENZO; GUNN III, LAWRENCE C.; WITZENS, JEREMY; WHITE, JOSEPH W.
To: LUXTERA, INC.
Reel/Frame 020103/0927 →