IP Library Granted Patent US 7,759,153
Granted Patent B2
US 7,759,153 · App. 11/872,065 · Granted Jul 20, 2010

Method of fabricating electric field sensor having electric field shield

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Quick Facts
Patent No.
US 7,759,153
App. No.
11/872,065
Granted
Jul 20, 2010
Kind
B2
Abstract

A method of manufacturing an electric field sensor having an electric field shield. The method includes providing a substrate doped with a first impurity; forming a resistive tip having a resistance region doped with a low concentration of a second impurity at an apex of a protruding portion of the substrate, and first and second semiconductor electrode regions doped with a high concentration of the second impurity on both slopes of the protruding portion with the resistive region therebetween, wherein the second impurity has a polarity opposite to that of the first impurity; forming a dielectric layer on the resistive tip; forming a mask having a high aspect ratio on the dielectric layer; depositing a metal layer on the dielectric layer; and exposing the dielectric layer formed on the resistance region through the metal layer by removing the mask.

Claims (15)

1. A method of manufacturing an electric field sensor having an electric field shield, comprising:

providing a substrate doped with a first impurity;

forming a resistive tip having a resistance region doped with a low concentration of a second impurity at an apex of a protruding portion of the substrate, and first and second semiconductor electrode regions doped with a high concentration of the second impurity on both slopes of the protruding portion with the resistive region therebetween, wherein the second impurity has a polarity opposite to that of the first impurity;

forming a dielectric layer on the resistive tip;

forming a mask having a high aspect ratio on the dielectric layer;

depositing a metal layer on the dielectric layer; and

exposing the dielectric layer formed on the resistance region through the metal layer by removing the mask.

2. The method of claim 1 , wherein the mask has an aspect ratio of at least 3:1.

3. The method of claim 1 , wherein the forming of the mask comprises depositing the mask using a focused ion beam (FIB) system.

4. The method of claim 1 , wherein the mask has an upper diameter greater than a lower diameter thereof that contacts the dielectric layer on the resistance region.

5. The method of claim 1 , wherein the forming of the mask comprises forming the lower diameter of the mask that contacts the dielectric layer to 10 to 100 nm.

6. The method of claim 1 , wherein the mask is formed of a material selected from carbon, tungsten, platinum, silicon oxide, and silicon nitride.

7. The method of claim 1 , further comprising exposing the resistance region by etching the dielectric layer on the resistance region exposed through the metal layer.

8. The method of claim 1 , wherein the forming of the dielectric layer comprises depositing the dielectric layer having a first thickness on the resistance region.

9. The method of claim 1 , wherein the mask is formed to correspond to the resistance region.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE ERRONEOUSLY FILED NO. 7255478 FROM SCHEDULE PREVIOUSLY RECORDED AT REEL: 028153 FRAME: 0689. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 5, 2016
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 040001/0920 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SEAGATE TECHNOLOGY INTERNATIONAL
Reel/Frame 028153/0689 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2007
From: PARK, CHUL-MIN; KO, HYOUNG-SOO; HONG, SEUNG-BUM
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 019959/0699 →