Superjunction semiconductor device
View Patent ↗In accordance with an embodiment of the invention, a superjunction semiconductor device includes an active region and a termination region surrounding the active region. A central vertical axis of a boundary column of a second conductivity type material defines the boundary between the active region and the termination region. The active and termination regions include columns of first and second conductivity type material alternately arranged along a horizontal direction in a semiconductor region having top and bottom surfaces. At least one of the columns of the first conductivity type material in the termination region has a different width than a width of the columns of the first conductivity type material in the active region.
1. A superjunction semiconductor device having an active region and a termination region surrounding the active region, a central vertical axis of a boundary column of a second conductivity type material defining the boundary between the active region and the termination region, the active and termination regions including columns of first and second conductivity type material alternately arranged along a horizontal direction in a semiconductor region having top and bottom surfaces,
wherein the spacing between the central vertical axes of the boundary column and a first column of the second conductivity type material in the termination region placed closest to the boundary column is equal to the spacing between the central vertical axes of the boundary column and a second column of the second conductivity type material in the active region placed closest to the boundary column, and the width of the first column is greater than the width of the second column.
2. The superjunction semiconductor device of claim 1 , wherein the width of a third column of the first conductivity type material in the active region is greater than the sum of one-half the width of a fourth column of the second conductivity type material adjoining one side of the third column and one-half the width of a fifth column of the second conductivity type material adjoining the opposite side of the third column.
3. The superjunction semiconductor device of claim 1 , wherein the spacing between the central vertical axes of adjacent columns of the second conductivity type material in the termination region varies along a horizontal direction.
4. The superjunction semiconductor device of claim 1 , wherein the spacing between the central vertical axes of adjacent ones of at least three columns of the second conductivity type material in the termination region becomes progressively greater in a direction away from the active region.
5. The superjunction semiconductor device of claim 1 , wherein the first conductivity type is n-type, and the second conductivity type is p-type.
6. The superjunction semiconductor device of claim 1 , wherein the active region further comprises a plurality of planar-gate structures formed along the top surface of the semiconductor region.
7. A superjunction semiconductor device having an active region and a termination region surrounding the active region, a central vertical axis of a boundary column of a second conductivity type material defining the boundary between the active region and the termination region, the active and termination regions including columns of first and second conductivity type material alternately arranged along a horizontal direction in a semiconductor region having top and bottom surfaces,
wherein the spacing between the central vertical axes of adjacent columns of the second conductivity type material in the termination region becomes progressively greater in a direction away from the active region along a horizontal direction.
8. The superjunction semiconductor device of claim 7 wherein the active region further comprises a plurality of planar-gate structures formed along the top surface of the semiconductor region.
9. A superjunction semiconductor device having an active region and a termination region surrounding the active region, a central vertical axis of a boundary column of a second conductivity type material defining the boundary between the active region and the termination region, the active and termination regions including columns of first and second conductivity type material alternately arranged in a semiconductor region,
wherein at least one of the columns of the first conductivity type material in the termination region has a different width than a width of the columns of the first conductivity type material in the active region, and wherein the columns of the second conductivity type material in the termination and active regions are of the same width.
10. The superjunction semiconductor device of claim 1 , wherein a sum of a second conductivity type charge quantity in one half of the boundary column and one half of the first column is greater than a sum of a second conductivity type charge quantity in one half of the boundary column and one half of the second column.
11. The superjunction semiconductor device of claim 1 , wherein a first conductivity type charge quantity in a third column of the first conductivity type material in the termination region adjoining the boundary column is less than a first conductivity type charge quantity in a fourth column of the first conductivity type material in the active region adjoining the boundary column.
12. The superjunction semiconductor device of claim 1 , wherein a difference between a first conductivity type charge quantity in a third column of the first conductivity type material in the termination region adjoining the boundary column and a sum of a second conductivity type charge quantity in one half of the boundary column and one half of the first column is less than the difference between a first conductivity type charge quantity in a fourth column of the first conductivity type material in the active region adjoining the boundary column and a sum of a second conductivity type charge quantity in one half of the boundary column and one half of the second column.
13. The superjunction semiconductor device of claim 7 wherein widths of adjacent columns of the first conductivity type material in the termination region become progressively greater in the direction away from the active region along the horizontal direction.
14. The superjunction semiconductor device of claim 7 wherein widths of the columns of the second conductivity type material in the termination region are substantially equal.
15. The superjunction semiconductor device of claim 7 wherein the first conductivity type material is n-type, and the second conductivity material type is p-type.
16. The superjunction semiconductor device of claim 9 wherein a spacing between central vertical axes of adjacent columns of the second conductivity type material in the termination region becomes progressively greater in a direction away from the active region along a horizontal direction.
17. The superjunction semiconductor device of claim 9 wherein a sum of a second conductivity type charge quantity in one half of the boundary column and one half of a first column of the second conductivity type material in the termination region placed closest to the boundary column is greater than a sum of a second conductivity type charge quantity in one half of the boundary column and one half of a second column of the second conductivity type material in the active region placed closest to the boundary column.
18. The superjunction semiconductor device of claim 9 wherein a first conductivity type charge quantity in a first column of the first conductivity type material in the termination region adjoining the boundary column is less than a first conductivity type charge quantity in a second column of the first conductivity type material in the active region adjoining the boundary column.
19. The superjunction semiconductor device of claim 9 wherein the first conductivity type material is n-type, and the second conductivity type material is p-type.
20. The superjunction semiconductor device of claim 9 wherein the active region further comprises a plurality of planar-gate structures formed along a top surface of the semiconductor region.