Composition for stripping photoresist and method for manufacturing thin transistor array panel using the same

1. A method for manufacturing a thin film transistor array panel, comprising:

forming at least one of a first metal layer,

forming a plurality of first photoresist patterns on the first metal layer,

etching the first metal layer with the first photoresist patterns as masks to form a gate line comprising a gate electrode,

stripping the first photoresist patterns,

forming a semiconductor layer on the gate line,

forming at least one of a second metal layer on the semiconductor layer,

forming a plurality of second photoresist patterns on the second metal layer, and

etching the semiconductor layer and the second metal layer with the second photoresist patterns as masks to form a semiconductor, a data line crossing the gate line and comprising a source electrode, and a drain electrode separated from the source electrode,

stripping the second photoresist patterns, and

forming a pixel electrode coupled with the drain electrode,

wherein at least one of stripping the first photoresist patterns and stripping the second photoresist patterns is performed by using a photoresist stripper comprising about 5 wt % to about 20 wt % alcohol amine, about 40 wt % to about 70 wt % glycol ether, about 20 wt % to about 40 wt % N-methyl pyrrolidone, and about 0.2 wt % to about 6 wt % chelating agent.

2. The method for manufacturing a thin film transistor array panel according to claim 1 , wherein the first metal layer comprises an aluminum-containing metal layer and a molybdenum-containing metal layer.

3. The method for manufacturing a thin film transistor array panel according to claim 1 , wherein the second metal layer comprises a molybdenum-containing metal layer, an aluminum-containing metal layer, and a molybdenum-containing metal layer in sequence.

4. The method for manufacturing a thin film transistor array panel according to claim 1 , wherein the second photoresist patterns have a first portion and a second portion thicker than the first portion.

5. The method for manufacturing a thin film transistor array panel according to claim 4 , wherein the first portion is disposed between the source electrode and the drain electrode, and the second portion is disposed on the data line and the drain electrode.

6. The method for manufacturing a thin film transistor array panel according to claim 1 , further comprising the step of forming an ohmic contact layer between the step of forming the semiconductor layer and the step of forming the second metal layer,

wherein the ohmic contact layer is etched together with the semiconductor layer and the second metal layer with the second photoresist patterns as masks.

7. The method for manufacturing a thin film transistor array panel according to claim 1 , wherein the alcohol amine is one of monoisopropanol amine (CH 3 CH(OH)CH 2 NH 2 ), N-monoethanol amine (HO(CH 2 ) 2 NH 2 ), and a mixture thereof.

8. The method for manufacturing a thin film transistor array panel according to claim 7 , wherein the glycol ether is one of carbitol [C 2 H 5 O(CH 2 CH 2 O) 2 H)], methyl diglycol [CH 3 O(CH 2 CH 2 O) 2 H], butyl diglycol [C 4 H 9 O(CH 2 CH 2 O) 2 H], and a mixture thereof.

9. The method for manufacturing a thin film transistor array panel according to claim 8 , wherein the chelating agent is one of methyl gallate, hydroxyl ethyl piperasane (HEP), and a mixture thereof.

10. The method for manufacturing a thin film transistor array panel according to claim 1 , wherein at least one of stripping the first photoresist patterns and stripping the second photoresist patterns is performed at a temperature of about 50° C. to about 80° C.

11. The method for manufacturing a thin film transistor array panel according to claim 10 , wherein at least one of stripping the first photoresist patterns and stripping the second photoresist patterns is performed for about 60 seconds to about 300 seconds.