High performance system-on-chip using post passivation process
The present invention extends the above referenced continuation-in-part application by in addition creating high quality electrical components, such as inductors, capacitors or resistors, on a layer of passivation or on the surface of a thick layer of polymer. In addition, the process of the invention provides a method for mounting discrete electrical components at a significant distance removed from the underlying silicon surface.
1 . A method of forming an integrated circuit chip, comprising:
providing a silicon substrate, multiple semiconductor devices in or on said silicon substrate, wherein one of said multiple semiconductor devices comprises a transistor, a metallization structure over said silicon substrate, wherein said metallization structure is connected to said multiple semiconductor devices, and wherein said metallization structure comprises a first metal layer and a second metal layer over said first metal layer, a dielectric layer between said first and second metal layers, a passivation layer over said metallization structure and over said dielectric layer, a first passivation opening in said passivation layer exposing a first pad of said metallization structure, and a second passivation opening in said passivation layer exposing a second pad of said metallization structure, wherein said first and second pads are separate from each other, wherein said passivation layer comprises an oxide layer and a nitride layer over said oxide layer;
forming a first conductive structure over said first pad, and a second conductive structure over said second pad;
forming a first solder structure over said first conductive structure, and a second solder structure over said second conductive structure, wherein said forming said first and second solder structures comprises a screen printing process;
mounting a discrete electrical component over said passivation layer, wherein a first contact point of said discrete electrical component is on said first solder structure, and a second contact point of said discrete electrical component is on said second solder structure; and
flowing said first and second solder structures, wherein, after said flowing said first and second solder structures, said first contact point is connected to said first pad through said first solder structure, said first conductive structure and said first passivation opening, and said second contact point is connected to said second pad through said second solder structure, said second conductive structure and said second passivation opening.
2 . The method of claim 1 , wherein said metallization structure comprises electroplated copper.
3 . The method of claim 1 further comprising forming a polymer layer over said passivation layer.
4 . The method of claim 3 , wherein said forming said polymer layer comprises multiple coating and curing processes.
5 . The method of claim 1 , wherein said mounting said discrete electrical component comprises mounting a capacitor.
6 . The method of claim 1 , wherein said mounting said discrete electrical component comprises mounting an inductor.
7 . The method of claim 1 , wherein said mounting said discrete electrical component comprises mounting a resistor.
8 . The method of claim 1 , wherein said metallization structure comprises aluminum.
9 . A method of forming an integrated circuit chip, comprising:
providing a silicon substrate, multiple semiconductor devices in or on said silicon substrate, wherein one of said multiple semiconductor devices comprises a transistor, a metallization structure over said silicon substrate, wherein said metallization structure is connected to said multiple semiconductor devices, and wherein said metallization structure comprises a first metal layer and a second metal layer over said first metal layer, a dielectric layer between said first and second metal layers, a passivation layer over said metallization structure and over said dielectric layer, a first passivation opening in said passivation layer exposing a first pad of said metallization structure, and a second passivation opening in said passivation layer exposing a second pad of said metallization structure, wherein said first and second pads are separate from each other, wherein said passivation layer comprises an oxide layer and a nitride layer over said oxide layer;
forming a first conductive structure over said first pad, and a second conductive structure over said second pad;
forming a first solder structure over said first conductive structure, and a second solder structure over said second conductive structure, wherein said forming said first and second solder structures comprises a ball mounting process;
mounting a discrete electrical component over said passivation layer, wherein a first contact point of said discrete electrical component is on said first solder structure, and a second contact point of said discrete electrical component is on said second solder structure; and
flowing said first and second solder structures, wherein, after said flowing said first and second solder structures, said first contact point is connected to said first pad through said first solder structure, said first conductive structure and said first passivation opening, and said second contact point is connected to said second pad through said second solder structure, said second conductive structure and said second passivation opening.
10 . The method of claim 9 , wherein said metallization structure comprises electroplated copper.
11 . The method of claim 9 further comprising forming a polymer layer on said passivation layer.
12 . The method of claim 11 , wherein said forming said polymer layer comprises multiple coating and curing processes.
13 . The method of claim 9 , wherein said mounting said discrete electrical component comprises mounting a capacitor.
14 . The method of claim 9 , wherein said mounting said discrete electrical component comprises mounting an inductor.
15 . The method of claim 9 , wherein said mounting said discrete electrical component comprises mounting a resistor.
16 . The method of claim 9 , wherein said metallization structure comprises aluminum.
17 . A method of forming an integrated circuit chip, comprising:
providing a silicon substrate, multiple semiconductor devices in or on said silicon substrate, wherein one of said multiple semiconductor devices comprises a transistor, a metallization structure over said silicon substrate, wherein said metallization structure is connected to said multiple semiconductor devices, and wherein said metallization structure comprises a first metal layer and a second metal layer over said first metal layer, a dielectric layer between said first and second metal layers, a passivation layer over said metallization structure and over said dielectric layer, a first passivation opening in said passivation layer exposing a first pad of said metallization structure, and a second passivation opening in said passivation layer exposing a second pad of said metallization structure, wherein said first and second pads are separate from each other, wherein said passivation layer comprises an oxide layer and a nitride layer over said oxide layer;
forming a polymer layer over said passivation layer, wherein a first polymer opening in said polymer layer exposes said first pad, and a second polymer opening in said polymer layer exposes said second pad, wherein said polymer layer has a thickness between 2 and 150 microns;
forming a first conductive structure over said first pad, and a second conductive structure over said second pad;
forming a first solder structure over said first conductive structure, and a second solder structure over said second conductive structure, wherein said forming said first and second solder structures comprises a screen printing process;
mounting a discrete electrical component over said polymer layer, wherein a first contact point of said discrete electrical component is on said first solder structure, and a second contact point of said discrete electrical component is on said second solder structure; and
flowing said first and second solder structures, wherein, after said flowing said first and second solder structures, said first contact point is connected to said first pad through said first solder structure, said first conductive structure, said first polymer opening and said first passivation opening, and said second contact point is connected to said second pad through said second solder structure, said second conductive structure , said second polymer opening and said second passivation opening.
18 . The method of claim 17 , wherein said metallization structure comprises sputtered aluminum.
19 . The method of claim 17 , wherein said metallization structure comprises electroplated copper.
20 . The method of claim 17 , wherein said mounting said discrete electrical component comprises mounting a capacitor.
21 . The method of claim 17 , wherein said mounting said discrete electrical component comprises mounting an inductor.
22 . The method of claim 17 , wherein said mounting said discrete electrical component comprises mounting a resistor.
23 . The method of claim 17 , wherein a vertical distance between said discrete electrical component and said passivation layer is greater than a thickness of said passivation layer, greater than a thickness of said first pad and greater than a thickness of said second pad.
24 . The method of claim 17 , wherein said forming said polymer layer comprises multiple coating and curing processes.
25 . The method of claim 17 , wherein said forming said polymer layer comprises forming a polyimide layer.