IP Library Granted Patent US 7,701,296
Granted Patent B2
US 7,701,296 · App. 11/874,966 · Granted Apr 20, 2010

Semiconductor device

Assignee: Mitsubishi Electric Corporation
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Quick Facts
Patent No.
US 7,701,296
App. No.
11/874,966
Granted
Apr 20, 2010
Kind
B2
Abstract

A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

Claims (35)

1. A semiconductor device comprising:

an amplifying transistor having an input terminal, and

a current limiting circuit connected to the input terminal of said amplifying transistor, wherein said current limiting circuit limits current so that an electric power larger than a maximum electric power allowable for said amplifying transistor does not pass, and said current limiting circuit includes

a protecting transistor having a source, a gate, and a drain,

a first protecting resistor connecting the source to the gate of said protecting transistor, and

a second protecting resistor connecting the drain to the gate of said protecting transistor.

2. The semiconductor device according to claim 1 , wherein said current limiting circuit functions as a limiter amplifier for limiting output power.

3. The semiconductor device according to claim 1 , wherein said current limiting circuit limits current to not more than ⅕ of a maximum current of said amplifying transistor.

4. A semiconductor device comprising:

a plurality of amplifying transistors having respective input terminals and connected in parallel, and

a plurality of current limiting circuits, each current limiting circuit being connected to the input terminal of a respective amplifying transistor, wherein each of the current limiting circuits limits current so that an electric power larger than a maximum electric power allowable for the corresponding amplifying transistor does not pass, and each current limiting circuit includes

a respective protecting transistor having a source, a gate, and a drain,

a respective first protecting resistor connecting the source to the gate of said respective protecting transistor, and

a respective second protecting resistor connecting the drain to the gate of said respective protecting transistor.

5. A semiconductor device comprising:

an amplifying transistor having an input terminal, and

a plurality of current limiting circuits, said current limiting circuits being connected in series to the input terminal of said amplifying transistor, wherein said plurality of current limiting circuits limit current so that an electric power larger than a maximum electric power allowable for said amplifying transistor does not pass, and each current limiting circuit includes

a protecting transistor having a source, a gate, and a drain,

a first protecting resistor connecting the source to the gate of said protecting transistor, and

a second protecting resistor connecting the drain to the gate of said protecting transistor.

6. A semiconductor device comprising:

an amplifying transistor having an input terminal, and

a current limiting circuit connected to the input terminal of said amplifying transistor, wherein

said current limiting circuit limits current so that an electric power larger than a maximum electric power allowable for said amplifying transistor does not pass, and

said current limiting circuit consists of

an active region in a semiconductor layer, and

first and second electrodes spaced apart from each other, each of said first and second electrodes being ohmically connected to said active region.

7. The semiconductor device according to claim 6 , wherein said active region has a dopant impurity concentration and includes a relatively higher dopant impurity concentration region within said active region, between said first electrode and said second electrode.

8. The semiconductor device according to claim 6 , including a recess in said active region between said first electrode and said second electrode.

9. The semiconductor device according to claim 6 , wherein said semiconductor layer is a GaN layer.

10. A semiconductor device comprising:

an amplifying transistor having an input terminal, and

a current limiting circuit connected to the input terminal of said amplifying transistor, wherein

said current limiting circuit limits current so that an electric power larger than a maximum electric power allowable for said amplifying transistor does not pass, and

current flowing through said current limiting circuit is symmetric with respect to polarity of voltage applied to said current limiting circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2020
From: MITSUBISHI ELECTRIC CORPORATION
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 052122/0475 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2007
From: INOUE, AKIRA; GOTO, SEIKI; KANAYA, KOU; WATANABE, SHINSUKE
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 019986/0390 →
Priority Claims (1)
JP 2007-137127 · May 23, 2007 · national
Continuity (1)
Related Publication 20080290951A1 · Nov 27, 2008