IP Library Granted Patent US 8,502,263
Granted Patent B2
US 8,502,263 · App. 11/875,381 · Granted Aug 6, 2013

Light-emitter-based devices with lattice-mismatched semiconductor structures

Inventors: Jizhong Li (Bordentown, NJ); Anthony J. Lochtefeld (Ipswich, MA)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 8,502,263
App. No.
11/875,381
Granted
Aug 6, 2013
Kind
B2
Abstract

Some aspects for the invention include a method and a structure including a light-emitting device disposed over a second crystalline semiconductor material formed over a semiconductor substrate comprising a first crystalline material.

Claims (31)

1. A structure comprising:

a trench defined in a dielectric layer disposed over and in contact with a top surface of a substrate, the substrate comprising a first crystalline semiconductor material, the trench comprising a width w proximate the top surface of the substrate and comprising a first height h 1 at a top surface of the dielectric layer, the first height h 1 extending from the top surface of the substrate in a direction perpendicular to the top surface of the substrate, the first height h 1 equal to or greater than half the width w;

a second crystalline semiconductor material disposed in the trench and adjoining the first crystalline semiconductor material, the second crystalline semiconductor material being lattice-mismatched to the first crystalline semiconductor material, the second crystalline semiconductor material having a second height h 2 at a top surface of the second crystalline semiconductor material, the second height h 2 being equal to or greater than half the width w, the first height h 1 at the top surface of the dielectric layer being greater than the second height h 2 at the top surface of the second crystalline semiconductor material; and

a light-emitting device comprising a heteroepitaxial structure, the heteroepitaxial structure being disposed over and in contact with the top surface of the second crystalline semiconductor material, the heteroepitaxial structure being disposed at least partially in the trench, a surface of the heteroepitaxial structure between dissimilar materials being lower than the first height h 1 at the top surface of the dielectric layer.

2. The structure of claim 1 , wherein the trench has a ratio of h 1 /w≧1.

3. The structure of claim 1 , wherein the light-emitting device is a laser or a light-emitting diode.

4. The structure of claim 3 , wherein the light-emitting device is a laser and comprises at least one of a GaAs, an AlAs, or an AlGaAs layer.

5. The structure of claim 3 , wherein the light-emitting device is a laser and comprises at least one of InP, GaP, AlP, InAs, AlAs, GaAs, InSb, AlSb, GaSb, InN, or their ternary or quaternary compounds.

6. The structure of claim 3 , wherein the light-emitting device is a light-emitting diode and comprises a GaAs, an AlAs, or an AlGaAs layer.

7. The structure of claim 3 , wherein light-emitting device is a light-emitting diode and comprises InP, InAs, AlAs, GaAs, AlSb, GaSb, or their ternary or quaternary compounds.

8. The structure of claim 1 , wherein the first crystalline semiconductor material comprises at least one of a group IV element or compound, a II-VI compound, or a III-V compound.

9. The structure of claim 1 , wherein the second crystalline material comprises at least one of a II-VI compound or a III-V compound.

10. The structure of claim 1 , further comprising a top contact disposed over at least a portion of the light-emitting device and a second contact disposed over and in contact with a portion of the substrate.

11. The structure of claim 1 , wherein a plurality of trenches are formed in the dielectric layer, the second crystalline semiconductor material being disposed in each trench.

12. The structure of claim 11 , wherein a distance between two adjacent trenches is at least equal to an average width of the adjacent trenches.

13. The structure of claim 1 , wherein the light-emitting device comprises a laser heteroepitaxial structure wholly disposed in the trench.

14. The structure of claim 1 , wherein the light-emitting device comprises an LED heteroepitaxial structure wholly disposed in the trench.

15. A structure comprising:

a dielectric sidewall disposed adjoining a top surface of a substrate comprising a first crystalline semiconductor material, the dielectric sidewall having a first height h 1 at a top surface of the dielectric sidewall from the top surface of the substrate and in a direction perpendicular to the top surface of the substrate;

a second crystalline semiconductor material disposed adjoining the dielectric sidewall and adjoining the first crystalline semiconductor material, the second crystalline semiconductor material being lattice-mismatched to the first crystalline semiconductor material, wherein dislocation defects in the second crystalline semiconductor material terminate at the dielectric sidewall; and

a cascade superlattice disposed over and in contact with at least a portion of the second crystalline semiconductor material and adjoining the dielectric sidewall, the cascade superlattice having a second height h 2 at a top surface of the cascade superlattice from the top surface of the substrate and in the direction perpendicular to the top surface of the substrate, the first height h 1 at the top surface of the dielectric sidewall being greater than or equal to the second height h 2 at the top surface of the cascade superlattice.

16. The structure of claim 15 , wherein the dielectric sidewall is a portion of a trench defined in a dielectric layer disposed over the substrate, the trench comprising a width w proximate the top surface of the substrate, the first height h 1 equal to or greater than half the width w, and wherein the second crystalline semiconductor material is disposed in the trench, the second crystalline semiconductor material having a third height h 3 equal to or greater than half the width w.

17. The structure of claim 16 , wherein the trench has a ratio of h 1 /w≧1.

18. The structure of claim 16 , wherein the cascade superlattice is wholly disposed in the trench.

19. A structure comprising:

a trench defined in a dielectric layer disposed over a substrate, the substrate comprising a first crystalline semiconductor material, the trench comprising a width w, a length L, and a first height h 1 , the width w and the length L being proximate a top surface of the substrate, the width w and the length L being in a same plane parallel to the top surface, the first height h 1 extending from the top surface in a direction perpendicular to the top surface, the first height h 1 equal to or greater than half the width w, the length L being greater than the width w;

a second crystalline semiconductor material disposed in the trench and adjoining the first crystalline semiconductor material, the second crystalline semiconductor material being lattice-mismatched to the first crystalline semiconductor material, the second crystalline semiconductor material having a second height h 2 equal to or greater than half the width w; and

a light-emitting device disposed over and in contact with at least a portion of the second crystalline semiconductor material, the light-emitting device being wholly disposed in the trench.

20. The structure of claim 1 , wherein the trench has a length L proximate the top surface of the substrate, the length L being greater than the width w, the trench having a uniform width from the top surface of the substrate to the first height h 1 .

21. The structure of claim 1 , wherein the trench has a length L proximate the top surface of the substrate, the length L being greater than the width w, the trench comprising sidewalls, each of the sidewalls extending in a respective single plane from the top surface of the substrate to the first height h 1 .

22. The structure of claim 15 , wherein the dielectric sidewall is a portion of a trench defined in a dielectric layer disposed over the substrate, the trench comprising a width w and length L adjacent the top surface of the substrate, the length L being greater than the width w.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2010
From: AMBERWAVE SYSTEMS CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 023775/0111 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2008
From: LI, JIZHONG; LOCHTEFELD, ANTHONY J.
To: AMBERWAVE SYSTEMS CORPORATION
Reel/Frame 020611/0380 →
Continuity (2)
Provisional Application 60852781 · Oct 19, 2006
Related Publication 20080093622A1 · Apr 24, 2008