Analog-to-digital converter
View Patent ↗An analog-digital (A-D) converter for outputting a digital signal corresponding to an analog input signal includes: an upper bit A-D converting section for conducting A-D conversion of the analog input signal and outputting an upper bit portion of the digital signal; a lower bit A-D converting section for conducting A-D conversion of the analog input signal and outputting a lower bit portion of the digital signal; and a majority circuit for sampling an A-D conversion result of the lower bit A-D converting section a plurality of times and determining a value of each of the lower bits by majority operation.
1. An analog-digital (A-D) converter for outputting a digital signal corresponding to an analog input signal, comprising:
an upper bit A-D converting section for conducting A-D conversion of the analog input signal and outputting an upper bit portion of the digital signal;
a lower bit A-D converting section for conducting A-D conversion of the analog input signal and outputting a lower bit portion of the digital signal;
a majority circuit for sampling an A-D conversion result of the lower bit A-D converting section a plurality of times and determining a value of each of the lower bits by majority operation; and
a variable resistor circuit having a resistance value varying according to digital data for producing a reference voltage, the digital data for producing a reference voltage being produced by adding lower bits having a value “1” to the upper bits, wherein
the variable resistor circuit divides a voltage obtained by D-A conversion of the digital data for producing a reference voltage, and
the lower bit A-D converting section uses the voltage output from the variable resistor circuit as a reference voltage.
2. The A-D converter according to claim 1 , wherein the lower bit A-D converting section is capable of varying a bit length of the lower bits.
3. The A-D converter according to claim 1 , wherein the majority circuit is capable of varying the number of sampling operations.
4. The A-D converter according to claim 3 , wherein the majority circuit varies the number of sampling operations according to a cycle of noise.
5. The A-D converter according to claim 3 , further comprising a number-of-sampling-operations determining circuit for obtaining respective frequencies of “1” and “0” sampled in majority operation, and controlling the number of sampling operations of the majority circuit according to the frequencies.