IP Library Granted Patent US 8,203,080
Granted Patent B2
US 8,203,080 · App. 11/879,256 · Granted Jun 19, 2012

Build-up printed wiring board substrate having a core layer that is part of a circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,203,080
App. No.
11/879,256
Granted
Jun 19, 2012
Kind
B2
Abstract

Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.teh

Claims (38)

1. A printed wiring board substrate, comprising:

a core layer that includes a layer of non-metallized carbon material;

layer of metal including an interior surface from which protrusions extend; and

at least one build-up wiring portion formed on the layer of metal;

wherein the layer of metal is clad by resin to one side of the non-metallized carbon material and a plurality of the protrusions contact the layer of non-metallized carbon material;

wherein the build-up portion includes a dielectric layer comprising non-reinforced dielectric formed on the layer of metal;

wherein the build-up portion further comprises at least one micro wiring layer including a circuit that is electrically connected to the core layer via a plated through hole;

wherein the build-up portion further comprises an electrical interconnect to which a semiconductor die can be direct mounted.

2. The printed wiring board substrate of claim 1 , wherein the coefficient of thermal expansion of the core layer is lower than the coefficient of thermal expansion of the at least one build-up portion.

3. The printed wiring board substrate of claim 1 , wherein the core layer is configured to act as a ground plane.

4. The printed wiring board substrate of claim 1 , wherein the core layer is configured to act as a power plane.

5. The printed wiring board substrate of claim 1 , wherein the core layer is configured to act as a split power and ground plane.

6. The printed wiring board substrate of claim 1 , wherein the core layer includes at least one ply of woven carbon fiber.

7. The printed wiring board substrate of claim 1 , wherein

the layer of metal includes an exterior surface that is planar.

8. The printed wiring board substrate of claim 1 , wherein:

the layer of non-metallized carbon material is clad on both sides with a layer of metal;

a second build-up wiring portion is formed on the other layer of metal;

a plated through hole connects a circuit on a micro wiring layer in the first build up wiring portion with a circuit on a micro wiring layer in the second build up wiring portion; and

the plated through hole is electrically isolated from the core layer by a resin filled clearance hole.

9. The printed wiring board substrate of claim 1 , wherein the core layer has a coefficient of thermal expansion of between 0 ppm/° C. and 12 ppm/° C. in the surface spreading direction.

10. The printed wiring board substrate of claim 9 , wherein the core layer has a coefficient of thermal expansion of between 0 ppm/° C. and 9 ppm/° C. in the surface spreading direction.

11. The printed wiring board substrate of claim 1 , wherein the core layer has a thermal conductivity of between 2 W/m.K and 500 W/m.K in the surface spreading direction.

12. The printed wiring board substrate of claim 1 , wherein the core layer has a thermal conductivity of between 50 W/m.K and 1000 W/m.K in the surface spreading direction.

13. The printed wiring board substrate of claim 1 , wherein the core layer has a tensile strength of between 5 msi and 35 msi.

14. The printed wiring board substrate of claim 1 , wherein the core layer has a tensile strength of between 10 msi and 40 msi.

15. The printed wiring board substrate of claim 1 , wherein the core layer has a dielectric constant that is greater than 6.0 at 1 MHz.

16. The printed wiring board of claim 1 , wherein the core layer has a thickness that is at least 30% of the thickness of the printed wiring board substrate.

17. A printed wiring board substrate, comprising:

a core layer that includes:

a layer of non-metallized carbon material;

a layer of metal including an interior surface from which protrusions extend;

wherein the layer of metal is bonded by resin to the layer of non-metallized carbon material and a plurality of the protrusions contact the layer of non-metallized carbon material; and

at least one build-up wiring portion formed on the layer of metal;

wherein the build-up portion further comprises at least one micro wiring layer including a circuit that is electrically connected to the core layer via a plated through hole;

wherein the build-up portion further comprises an electrical interconnect to which a semiconductor die can be direct mounted.

18. The printed wiring board substrate of claim 17 , wherein

the layer of metal includes an exterior surface that is planar.

Assignments (4)
SECURITY INTEREST Recorded Nov 28, 2017
From: STABLCOR TECHNOLOGY, INC.
To: KPPB LLP
Reel/Frame 044822/0384 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2011
From: DODSON, JAMES D.; CARSON, THOMAS R.; SCHNEIDER, DOUG S.
To: STABLCOR TECHNOLOGY, INC.
Reel/Frame 026472/0760 →
BILL OF SALE Recorded May 24, 2011
From: STABLCOR, INC.
To: DODSON, JAMES D.; CARSON, THOMAS R.; SCHNEIDER, DOUG S.
Reel/Frame 026331/0916 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2007
From: VASOYA, KALU K.
To: STABLCOR, INC.
Reel/Frame 019748/0430 →