Spin transfer MRAM device with reduced coefficient of MTJ resistance variation

1 . A spin transfer MRAM unit cell comprising:

a local transistor capable of providing a critical switching current to an MTJ cell element;

a horizontally directed word line contacting said transistor and capable of activating said transistor so that a current is produced;

a horizontally directed bit line, vertically separated from said word line and directed transversely to said word line;

a configuration of N vertically adjacent MTJ sub-cells, wherein N is an integer greater than 1, said configuration including a first sub-cell and a last sub-cell and said configuration being electrically connected in linear series, wherein all MTJ sub-cells have the same multi-layer structure with the same geometry and each sub-cell comprises, in a vertically stacked configuration, a bottom electrode, a pinning layer, a synthetic pinned layer, a tunneling barrier layer, a free layer and an upper electrode and wherein

the bottom electrode of said first sub-cell of said N sub-cells electrically contacts said local transistor, and

the top electrode of said last sub-cell of said N sub-cells electrically contacts said bit line, and wherein

said top electrode and said bottom electrode of each pair of vertically adjacent sub-cells are in electrical contact, whereby

a critical current capable of simultaneously switching the magnetization of said free layer in each sub-cell can pass vertically between said transistor and said bit line.

2 . The unit cell of claim 1 wherein the resistance variations of a statistical population of said unit cell is less by a factor of N −1/2 than the resistance variations of a statistical population of a unit cell having equivalent properties and formed of a single sub-cell.

3 . A spin transfer MRAM unit cell comprising:

a local transistor capable of providing a critical switching current to an MTJ cell element;

a horizontally directed word line contacting said transistor and capable of activating said transistor so that a current is produced;

a horizontally directed bit line, vertically separated from said word line and directed transversely to said word line;

a configuration of N horizontally adjacent MTJ sub-cells, wherein N is an integer greater than 1, each sub-cell of said N sub-cells being at a common vertical level and each sub-cell of said N sub-cells including a first sub-cell and a last sub-cell and said N sub-cells being electrically connected in linear series, wherein all MTJ sub-cells have the same multi-layer structure with the same geometry and each sub-cell comprises, in a vertically stacked configuration, a bottom electrode, a pinning layer, a synthetic pinned layer, a tunneling barrier layer, a free layer and an upper electrode and wherein

the bottom electrode of said first sub-cell of said configuration electrically contacts said local transistor, and

the top electrode of said last sub-cell of said configuration electrically contacts said bit line, and wherein

said top electrode and said bottom electrode of each pair of adjacent sub-cells are vertically displaced from each other and horizontally overlap, whereby said electrodes are placed in electrical contact by means of a conducting via formed between them, whereby

a critical current capable of simultaneously switching the magnetization of said free layer in each sub-cell can pass from said transistor, through each sub-cell to said bit line.

4 . The unit cell of claim 1 wherein the resistance variations of a statistical population of said unit cell is less by a factor of N −1/2 than the resistance variations of a statistical population of a unit cell having equivalent properties and formed of a single sub-cell.

5 . A method of forming a spin transfer MRAM unit cell comprising:

providing a substrate;

forming a vertically, electrically series connected sequence of MTJ sub-cells, said formation comprising:

forming a first bottom electrode layer on said substrate;

forming a first MTJ stack film on said first bottom electrode layer;

patterning said first bottom electrode layer to form a first bottom electrode;

patterning said first MTJ stack film to form a first MTJ sub-cell of desired cross-sectional shape;

forming a first blanket refill layer of dielectric material over and around said MTJ sub-cell;

planarizing said first blanket refill layer to expose an upper surface of said first MTJ sub-cell and to create a first coplanar surface of said first dielectric refill layer and said first MTJ sub-cell upper surface;

forming a first top electrode layer on said first coplanar surface;

forming a second MTJ stack layer on said first top electrode layer;

patterning said first top electrode layer to firm a first top electrode;

patterning said second MTJ stack layer to create a second MTJ sub-cell of desired cross-sectional shape;

forming a second blanket dielectric refill layer over and around said second MTJ sub-cell;

planarizing said second blanket refill layer to expose an upper surface of said second MTJ sub-cell and to create a second coplanar surface of said first dielectric refill layer and said second MTJ sub-cell upper surface;

forming a second top electrode layer on said second coplanar surface;

patterning said second top electrode layer to form a second top electrode;

forming a third blanket dielectric refill layer over and around said second top electrode;

planarizing said third blanket refill layer to expose an upper surface of said second top electrode and to create a third coplanar surface of said third dielectric refill layer and said second top electrode upper surface.

6 . The method of claim 5 further comprising the formation of a bit line on said third coplanar surface, said bit line electrically contacting said second top electrode upper surface and the unit cell therefore comprising two sub-cells.

7 . The method of claim 5 further comprising the formation of a conducting via through said substrate, wherein said conducting via electrically connects said first bottom electrode to a local transistor

8 . The method of claim 5 further comprising the formation of an additional N- 2 vertically electrically series connected sequence MTJ sub-cells, wherein the third MTJ sub-cell is formed on said second top electrode upper surface, thereby forming a unit cell comprising N vertically electrically series connected sub-cells.

9 . A method of forming a spin transfer MRAM unit cell comprising:

providing a substrate;

forming a horizontally, electrically series connected sequence of MTJ sub-cells, said formation comprising:

forming a bottom electrode layer on said substrate;

forming an MTJ stack film on said bottom electrode layer;

patterning said first bottom electrode layer and said MTJ stack film to form a horizontal sequence of N MTJ sub-cells, wherein N is an integer greater than 1, wherein there is a first and a last sub-cell and wherein each sub-cell is formed on a bottom electrode;

forming a blanket refill layer of dielectric material over and around said N MTJ sub-cells;

planarizing said blanket refill layer to expose an upper surface of each of said N MTJ sub-cell and to create a first coplanar surface of said blanket refill layer and said N MTJ sub-cell upper surfaces;

forming conducting vias through said blanket refill layer to contact bottom electrodes of each sub-cell;

forming a top electrode layer on said coplanar surface, said top electrode layer electrically contacting each of said vias and each of said top surfaces of said N MTJ sub-cells;

patterning said top electrode layer so that N-I electrical connections are formed between the top of an MTJ sub-cell and the top of a via that contacts the bottom electrode of an immediately adjacent sub-cell;

forming a planarized second blanket dielectric layer over said N sub-cells;

forming a final via to contact the top electrode of the Nth sub-cell and to pass vertically through said planarized blanket dielectric layer;

forming a bit line on said planarized blanket dielectric layer, wherein said bit line electrically contacts said final via and, thereby, makes electrical contact with said top electrode of said Nth sub-cell.

10 . The method of claim 9 further comprising the formation of a conducting via through said substrate, wherein said conducting via electrically connects the bottom electrode of the said first MTJ sub-cell to a local transistor