IP Library Granted Patent US 8,315,509
Granted Patent B2
US 8,315,509 · App. 11/883,147 · Granted Nov 20, 2012

Video player for digital video server

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Quick Facts
Patent No.
US 8,315,509
App. No.
11/883,147
Granted
Nov 20, 2012
Kind
B2
Abstract

A system for playing digital video at varying playback speeds can include a fetcher module configured to retrieve encoded pictures from a data store and an allocator module configured to selectively delete encoded pictures from an input cache. The system further can include a decoder module and an output cache module. The decoder module can decode pictures received from the input cache. The output cache module can store a plurality of decoded pictures and provide selected ones of the pictures as output. Pictures are processed within each of the modules according to a priority corresponding to each picture.

Claims (19)

1. A system for playing digital video at variable playback speeds comprising:

a fetcher module configured to retrieve encoded pictures from a data store;

an allocator module configured to selectively add retrieved encoded pictures to, and delete encoded pictures from, an input cache;

a decoder module configured to decode pictures received from said input cache; and

an output cache module configured to store a plurality of decoded pictures and provide selected ones of the pictures as output;

wherein pictures are processed within each of said modules according to a priority corresponding to each picture, wherein said priority indicates a distance between a position of a picture within a video timeline and an aim point that specifies a target location within the video timeline that is dependent upon the video playback position adjusted for velocity, and acceleration occurring during variable speed playback of the digital video.

2. The system of claim 1 , wherein each said module utilizes a different aim point within the video timeline.

3. The system of claim 1 , wherein the aim point is determined by multiplying the video playback velocity and video playback acceleration by at least one tuning coefficient and summing the results with a current position in the video timeline.

4. The system of claim 1 , wherein said fetcher retrieves encoded pictures having a highest priority from the data store.

5. The system of claim 1 , further comprising an upper control layer configured to limit the video playback acceleration to a predetermined maximum acceleration.

6. The system of claim 1 , further comprising an input cache for storing encoded pictures retrieved from the data store prior to decoding by said decoder module.

7. The system of claim 6 , wherein said allocator is operable only when said input cache does not have available space for storing newly retrieved pictures from the data store.

8. The system of claim 1 , wherein said decoder module comprises at least two decoders.

9. The system of claim 1 , wherein said decoder module comprises at least one decoder and at least one picture First-In-First-Out tag (FIFO) corresponding to said at least one decoder.

10. The system of claim 1 , wherein said decoder module evaluates encoded pictures within said input cache and selects at least one picture from said input cache for decoding, wherein the selected at least one picture has a highest priority based upon an aim point corresponding to said decoder module.

11. The system of claim 1 , said output cache module further comprising a write controller configured to overwrite lowest priority pictures with higher priority pictures.

12. The system of claim 11 , wherein said output cache module comprises a plurality of output cache buffers, said write controller selecting one of said output cache buffers from said plurality of output cache buffers prior to writing each decoded picture.

13. The system of claim 12 , said output cache module further comprising a read controller configured to select at least one field closest to a current position within the video timeline from said plurality of output cache buffers for display during each field time.

14. The system of claim 13 , said output cache module further comprising a read controller First-In-First-Out (FIFO) configured to delay position commands intended for said read controller by an adjustable amount.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME FROM INTERDIGITAL CE PATENT HOLDINGS TO INTERDIGITAL CE PATENT HOLDINGS, SAS. PREVIOUSLY RECORDED AT REEL: 47332 FRAME: 511. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 28, 2024
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS, SAS
Reel/Frame 066703/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2018
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS
Reel/Frame 047332/0511 →