IP Library Granted Patent US 7,859,032
Granted Patent B2
US 7,859,032 · App. 11/883,556 · Granted Dec 28, 2010

Solid-state imaging device and method for driving the same

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Quick Facts
Patent No.
US 7,859,032
App. No.
11/883,556
Granted
Dec 28, 2010
Kind
B2
Abstract

During an exposure time period (long accumulation time period) of a low shutter speed shooting mode, a second reference voltage Vss 2 , which is different from a first reference voltage Vss 1 (a ground voltage) corresponding to a reference voltage of a peripheral circuit, is applied to a well ( 5 ) where a photoelectric converter section ( 2 ) and a drain region ( 4 ) are formed, whereby generation of dark electrons at a portion of a surface of the well ( 5 ) below a gate electrode ( 6 ) is suppressed. A polarity of the second reference voltage Vss 2 is positive in the case where a conductivity type of the well ( 5 ) is a P-type, and is negative in the case of an N-type.

Claims (22)

1. A solid-state imaging device, comprising:

a first well;

a second well;

a photoreceptor section reference voltage wiring; and

a peripheral circuit reference voltage wiring, wherein:

the first well and the second well are arranged in a semiconductor substrate,

the first well includes a photoreceptor section including unit pixels arranged in a matrix format, each of the unit pixels including at least:

a photoelectric converter section which accumulates a signal charge obtained through a photoelectric conversion of an incident light;

a drain region to which the signal charge is transferred; and

a gate electrode which transfers the signal charge from the photoelectric converter section to the drain region,

the second well includes therein or thereon a peripheral circuit, the peripheral circuit including at least:

a vertical scanning circuit;

a horizontal scanning circuit; and

an amplifier circuit,

the first well and the second well are a P-type well,

the first well is electrically separated and different from the second well,

the first well is connected to the photoreceptor section reference voltage wiring,

the second well is connected to the peripheral circuit reference voltage wiring,

the photoreceptor section reference voltage wiring switchingly supplies a first voltage which is equal to or more than 0 V and a second voltage which is higher than the first voltage and is more than 0 V to the first well so that the first voltage is applied to the first well during a signal read-out time period and the second voltage is supplied to the first well during an exposure time period, and

the peripheral circuit reference voltage wiring supplies only the first voltage to the second well.

2. The solid-state imaging device of claim 1 , wherein the second voltage is one of a power supply voltage supplied to the semiconductor substrate and a voltage generated based on the power supply voltage.

3. The solid-state imaging device of claim 1 , wherein the second voltage is supplied separately from a power supply voltage.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Nov 14, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021835/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2008
From: INAGAKI, MAKOTO; MATSUNAGA, YOSHIYUKI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020846/0770 →