IP Library Granted Patent US 7,984,150
Granted Patent B2
US 7,984,150 · App. 11/888,269 · Granted Jul 19, 2011

Cell compatibilty in multiprocessor systems

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,984,150
App. No.
11/888,269
Granted
Jul 19, 2011
Kind
B2
Abstract

In one embodiment, a multiprocessor computer system comprises at least a first partition having a first operating system comprising logic to initiate a request to add a first cell to the first partition, open a communication interface between the first operating system and a firmware module on the first cell, and transmit from the first partition to the first cell a compatibility command, logic in the first cell to determine whether the first cell is compatible with the first partition, and logic in the first partition to add the first cell to the first partition in response to a determination that the first cell is compatible with the first partition.

Claims (41)

1. A method to manage the addition of one or more cells in a multiprocessor computer system comprising at least a first partition having a first operating system comprising:

initiating, in a the first partition, a request to add a first cell to the first partition;

opening a communication interface between the first operating system and a firmware module on the first cell;

transmitting from the first partition to the first cell a compatibility command;

determining, in the first cell, whether the first cell is compatible with the first partition; and

adding the first cell to the first partition in response to a determination that the first cell is compatible with the first partition.

2. The method of claim 1 , wherein:

the first partition maintains a compatibility structure; and

the compatibility structure includes revision data for at least one of a hardware device in the cell or a firmware module on the first cell, and configuration data for a device on the first cell.

3. The method of claim 2 , wherein transmitting from the first partition to the first cell a compatibility command comprises transmitting a pointer to the compatibility structure.

4. The method of claim 1 , further comprising rejecting the first cell in response to a determination that the first cell is incompatible with the first partition.

5. The method of claim 1 , further comprising:

determining, in response to a determination that the first cell is incompatible with the first partition, whether an incompatibility between the first cell and the first partition is recoverable; and

in response to a determination that the incompatibility is recoverable, changing one or more settings on the first cell.

6. The method of claim 5 , further comprising:

rebooting the first cell using one or more new settings; and

transmitting an interrupt from the first cell to the first partition, wherein the interrupt prompts the first operating system to retry adding the first cell.

7. The method of claim 1 , further comprising:

determining, in response to a determination that the first cell is incompatible with the first partition, whether an incompatibility between the first cell and the first partition is recoverable; and

in response to a determination that the incompatibility is irrecoverable, closing the communication path between the first partition and the first cell.

8. A multiprocessor computer system comprising:

at least a first partition having a first operating system comprising logic in the first partition to:

initiate a request to add a first cell to the first partition;

open a communication interface between the first operating system and a firmware module on the first cell; and

transmit from the first partition to the first cell a compatibility command;

logic in the first cell to determine whether the first cell is compatible with the first partition; and

logic in the first partition to add the first cell to the first partition in response to a determination that the first cell is compatible with the first partition.

9. The computer system of claim 8 , wherein:

the first partition maintains a compatibility structure; and

the compatibility structure includes revision data for at least one of a hardware device in the cell or a firmware module on the first cell, and configuration data for a device on the first cell.

10. The computer system of claim 9 , further comprising logic in the first partition to transmit a pointer to the compatibility structure with the compatibility command.

11. The computer system of claim 8 , further comprising logic in the first partition to reject the first cell in response to a determination that the first cell is incompatible with the first partition.

12. The computer system of claim 8 , further comprising logic in the first partition to:

determine, in response to a determination that the first cell is incompatible with the first partition, whether an incompatibility between the first cell and the first partition is recoverable; and

in response to a determination that the incompatibility is recoverable, change one or more settings on the first cell.

13. The computer system of claim 12 , further comprising logic in the first cell to:

reboot the first cell using one or more new settings; and

transmitting an interrupt from the first cell to the first partition, wherein the interrupt prompts the first operating system to retry adding the first cell.

14. The computer system of claim 8 , further comprising logic in the first partition to:

determine, in response to a determination that the first cell is incompatible with the first partition, whether an incompatibility between the first cell and the first partition is recoverable; and

in response to a determination that the incompatibility is irrecoverable, close the communication path between the first partition and the first cell.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2022
From: OT PATENT ESCROW, LLC
To: VALTRUS INNOVATIONS LIMITED
Reel/Frame 060005/0600 →
PATENT ASSIGNMENT, SECURITY INTEREST, AND LIEN AGREEMENT Recorded Jan 26, 2021
From: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP; HEWLETT PACKARD ENTERPRISE COMPANY
To: OT PATENT ESCROW, LLC
Reel/Frame 055269/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2008
From: HUGHES, NATHAN JARED; HACK, STEPHEN PATRICK
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 020805/0584 →