IP Library Granted Patent US 7,750,615
Granted Patent B2
US 7,750,615 · App. 11/888,480 · Granted Jul 6, 2010

Burst mode operation in a DC-DC converter

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Quick Facts
Patent No.
US 7,750,615
App. No.
11/888,480
Granted
Jul 6, 2010
Kind
B2
Abstract

The present invention relates to a converter and a driving method thereof. The converter uses an input voltage to generate an output voltage by a main switch's switching and applies power to a load, senses the current flowing to the main switch to generate a sense voltage, uses a first voltage corresponding to the current applied to the load and a sawtooth waveform signal having a first frequency to control a group frequency of the burst mode, controls the main switch's turn-on timing, and uses the first voltage and the sense voltage to determine whether to turn off the main switch, thereby controlling the main switch's switching. The converter determines the start and end of the period for switching according to the result of comparing the first voltage and the sawtooth waveform signal. Therefore, a converter for having a constant group frequency, preventing audible noise, and preventing output voltage ripple, and a driving method thereof, are provided.

Claims (46)

1. A converter comprising:

a main switch;

a power supply, configured to generate an output voltage by a switching operation of the main switch and by using an input voltage, and to transmit power to a load;

a current sensor, configured to sense a current flowing to the main switch to generate a sense voltage;

a burst mode controller, configured to control a burst mode group frequency by using a first voltage corresponding to a current transmitted to the load and a sawtooth waveform signal having a first frequency, wherein the burst mode controller is configured to determine a start and an end of a period for generating the switching operation according to the result of comparing the first voltage and the sawtooth waveform signal; and

a PWM controller, configured to control the turn-on timing of the main switch, and to determine the turn-off of the main switch by using the first voltage and the sense voltage, thus controlling the switching operation of the main switch.

2. The converter of claim 1 , wherein

the burst mode controller includes an oscillator, configured to generate the sawtooth waveform signal; and

the burst mode controller is configured to generate the first voltage by using a result of integrating the difference between a second voltage corresponding to the output voltage and a reference voltage, and to generate a burst mode control signal according to the result of comparing the first voltage and the sawtooth waveform signal.

3. The converter of claim 2 , wherein the burst mode controller comprises:

a first resistor having a first terminal connected to the output terminal;

a second resistor having a first terminal connected to a second terminal of the first resistor;

a trans-conductance amplifier, configured to receive a voltage at a node where the first resistor and the second resistor are coupled, and the reference voltage; and

a first comparator, configured to receive the first voltage and the sawtooth waveform signal, to compare the first voltage and the sawtooth waveform signal, and to generate the burst mode control signal according to the comparison result.

4. The converter of claim 3 , wherein the burst mode controller comprises:

a capacitor having a first terminal connected to an output terminal of the trans-conductance amplifier; and

a third resistor having a first terminal connected to a second terminal of the capacitor and a grounded second terminal.

5. The converter of claim 2 , wherein the PWM controller comprises:

a logical operator, configured to perform a logical operation on the burst mode control signal and a pulse signal to generate a first signal;

an on-time pulse generator, configured to generate the pulse signal;

a second comparator, configured to receive the first voltage and the sense voltage, and to generate a second signal according to the result of comparing the first voltage and the sense voltage; and

an SR flip-flop, configured to receive the first signal through a set terminal and the second signal through a reset terminal, and to generate a gate driver control signal according to logical values of the first signal and the second signal.

6. The converter of claim 5 , wherein

the first voltage is less than a peak of the sawtooth waveform signal, and a frequency of the pulse signal that is generated for a first period in which the sawtooth waveform signal is less than the first voltage, is essentially equal to the frequency of a pulse signal that is generated for another period excluding the first period.

7. The converter of claim 5 , wherein the PWM controller further comprises a gate driver, configured to determine the on/off of the main switch according to the gate driver control signal.

8. The converter of claim 7 , wherein

the SR flip-flop is configured to generate a gate driver control signal for turning on the main switch when the first signal is at a second level, and to generate a gate driver control signal for turning off the main switch when the second signal is at a third level.

9. The converter of claim 8 , wherein

the first level, the second level, and the third level are a high level, and the logical operator is configured to perform an AND logical operation.

10. The converter of claim 5 , wherein the current sensor comprises:

a sensor, configured to sense the current flowing to the main switch;

a slope compensation/offset voltage unit, configured to generate a slope compensation and offset voltage; and

an adder, configured to sum the offset voltage and a voltage corresponding to the current flowing to the main switch to generate the sense voltage.

11. A method for driving a converter for converting an input voltage into an output voltage by a switching operation of a main switch, the method comprising:

a) controlling a switching-on period and a switching-off period in the burst mode by using a first voltage corresponding to the output voltage and a sawtooth waveform signal having a first frequency;

b) controlling the main switch to be turned on at least for a first period during the switching on period;

c) sensing a first current flowing to the main switch; and

d) comparing a sense voltage corresponding to the first current and a first voltage corresponding to the output voltage, and determining whether to turn off the main switch;

wherein step b) comprises performing a logical operation on a burst mode control signal corresponding to the result of comparing the first voltage and the sawtooth waveform signal and a pulse having an enable level for the first period.

12. The method of claim 11 , wherein step a) comprises:

amplifying a difference between a reference voltage and a voltage that is generated by dividing the output voltage to generate the first voltage; and

identifying the switching-on period and the switching-off period of the burst mode according to the result of comparing the first voltage and the sawtooth waveform signal.

13. The method of claim 11 , wherein step c) comprises

generating the sense voltage by adding an offset voltage to a voltage corresponding to the current flowing to the main switch.

14. The method of claim 13 , wherein step d) comprises

comparing the first voltage and the sense voltage to determine whether to turn off the main switch.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2008
From: JUNG, SANG-HWA; LEE, KYUNG-GOO
To: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
Reel/Frame 021517/0870 →