Switching device
View Patent ↗To provide a switching device capable of a switch-controlling a voltage source regardless of voltage changes in the voltage source to be switched and the voltage source employed for switch control. A switching path 61 includes, between the input terminal 1 and output terminal 4 for a voltage source, a series connection of the source or drain electrodes of PMOS transistors 10 a and 10 b connected to their back-gate electrode. A driving circuit has an NMOS transistor 11 a having a load resistor 12 a at its drain electrode and NMOS transistor 11 b having a load resistor 12 b at its drain electrode, which are connected to the gate electrodes of the PMOS transistors, respectively and receives the output from the logic inverter 14 for the switching control.
1. A switching device for selectively switching the connection between any one of a plurality of voltage sources and a power-supplied device, each of switching paths for connecting each of the plurality of voltage sources and the power-supplied device comprising:
an input terminal, to be connected to any one of the voltage sources;
a common output terminal, to be connected to the power-supplied device; and
a first and a second enhancement type P-channel MOS transistor, the drain electrode of the first enhancement type P-channel MOS transistor and the source electrode of the second enhancement type P-channel MOS transistor being connected to each other;
wherein the gate electrode of the first enhancement type P-channel MOS transistor is connected to the output terminal;
the gate electrode of the second enhancement type P-channel MOS transistor is connected to the input terminal;
the first enhancement type P-channel MOS transistor and the second enhancement type P-channel MOS transistor are connected in series;
the output terminal is connected to the gate electrode of the first enhancement type P-channel MOS transistor via a first resistor; and
the input terminal is connected to the gate electrode of the second enhancement type P-channel MOS transistor via s second resistor.
2. A switching device for selectively switching the connection between any one of a plurality of voltage sources and a power-supplied device, each of switching paths for connecting each of the plurality of voltage sources and the power-supplied device comprising:
an input terminal, to be connected to any one of the voltage sources;
a common output terminal, to be connected to the power-supplied device; and
a first and a second enhancement type P-channel MOS transistor, the drain electrode of the first enhancement type P-channel MOS transistor and the source electrode of the second enhancement type P-channel MOS transistor being connected to each other;
wherein the gate electrode of the first enhancement type P-channel MOS transistor is connected to the output terminal;
the gate electrode of the second enhancement type P-channel MOS transistor is connected to the input terminal;
the first enhancement type P-channel MOS transistor and the second enhancement type P-channel MOS transistor are connected in series;
the output terminal is connected to the gate electrode of the first enhancement type P-channel MOS transistor via a first level shift circuit; and
the input terminals is connected to the gate electrode of the second enhancement type P-channel MOS transistor via a second level shift circuit.
3. The switching device according to claim 1 , wherein:
a switching control input terminal is connected to the gate electrode of the first enhancement type P-channel MOS transistor and the gate electrode of the second enhancement type P-channel MOS transistor respectively via a first N MOS transistor and a second N MOS transistor.
4. The switching device according to claim 1 , wherein:
a back gate electrode of the first enhancement type P-channel MOS transistor and the source electrode thereof are connected; and
a back gate electrode of the second enhancement type P-channel MOS transistor and the drain electrode thereof are connected.
5. The switching device according to claim 1 , wherein:
a back gate electrode of the first enhancement type P-channel MOS transistor and the drain electrode thereof are connected; and
a back gate electrode of the second enhancement type P-channel MOS transistor and the source electrode thereof are connected.
6. The switching device according to claim 1 , wherein:
in case of exchanging the connection switching between the plurality of voltage sources and the input terminal, a delay time is provided in a logic input rising.
7. A switching device for selectively switching the connection between any one of a plurality of voltage sources and a power-supplied device, each of switching paths for connecting each of the plurality of voltage sources and the power-supplied device comprising:
an input terminal, to be connected to any one of the voltage sources;
a common output terminal, to be connected to the power-supplied device; and
a first and a second enhancement type P-channel MOS transistor, the source electrode of the first enhancement type P-channel MOS transistor and the drain electrode of the second enhancement type P-channel MOS transistor being connected to each other;
wherein the gate electrode of the first enhancement type P-channel MOS transistor is connected to the output terminal;
the gate electrode of the second enhancement type P-channel MOS transistor is connected to the input terminal;
the output terminal is connected to the gate electrode of the first enhancement type P-channel MOS transistor via a first resistor; and
the input terminal is connected to the gate electrode of the second enhancement type P-channel MOS transistor via s second resistor.
8. A switching device for selectively switching the connection between any one of a plurality of voltage sources and a power-supplied device, each of switching paths for connecting each of the plurality of voltage sources and the power-supplied device comprising:
an input terminal, to be connected to any one of the voltage sources;
a common output terminal, to be connected to the power-supplied device; and
a first and a second enhancement type P-channel MOS transistor, the source electrode of the first enhancement type P-channel MOS transistor and the drain electrode of the second enhancement type P-channel MOS transistor being connected to each other;
wherein the gate electrode of the first enhancement type P-channel MOS transistor is connected to the output terminal;
the gate electrode of the second enhancement type P-channel MOS transistor is connected to the input terminal;
the output terminal is connected to the gate electrode of the first enhancement type P-channel MOS transistor via a first level shift circuit; and
the input terminals is connected to the gate electrode of the second enhancement type P-channel MOS transistor via a second level shift circuit.
9. The switching device according to claim 7 , wherein:
a switching control input terminal is connected to the gate electrode of the first enhancement type P-channel MOS transistor and the gate electrode of the first enhancement type P-channel MOS transistor respectively via a first N MOS transistor and a second N MOS transistor.
10. The switching device according to claim 7 , wherein:
a back gate electrode of the first enhancement type P-channel MOS transistor and the source electrode thereof are connected; and
a back gate electrode of the second enhancement type P-channel MOS transistor and the drain electrode thereof are connected.
11. The switching device according to claim 7 , wherein:
a back gate electrode of the first enhancement type P-channel MOS transistor and the drain electrode thereof are connected; and
a back gate electrode of the second enhancement type P-channel MOS transistor and the source electrode thereof are connected.
12. The switching device according to claim 7 , wherein:
in case of exchanging the connection switching between the plurality of voltage sources and the input terminal, a delay time is provided in a logic input rising.
13. The switching device according to claim 2 , wherein:
a back gate electrode of the first enhancement type P-channel MOS transistor and the source electrode thereof are connected; and
a back gate electrode of the second enhancement type P-channel MOS transistor and the drain electrode thereof are connected.
14. The switching device according to claim 2 , wherein:
a back gate electrode of the first enhancement type P-channel MOS transistor and the drain electrode thereof are connected; and
a back gate electrode of the second enhancement type P-channel MOS transistor and the source electrode thereof are connected.
15. The switching device according to claim 2 , wherein:
in case of exchanging the connection switching between the plurality of voltage sources and the input terminal, a delay time is provided in a logic input rising.
16. The switching device according to claim 8 , wherein:
a back gate electrode of the first enhancement type P-channel MOS transistor and the source electrode thereof are connected; and
a back gate electrode of the second enhancement type P-channel MOS transistor and the drain electrode thereof are connected.
17. The switching device according to claim 8 , wherein:
a back gate electrode of the first enhancement type P-channel MOS transistor and the drain electrode thereof are connected; and
a back gate electrode of the second enhancement type P-channel MOS transistor and the source electrode thereof are connected.
18. The switching device according to claim 8 , wherein:
in case of exchanging the connection switching between the plurality of voltage sources and the input terminal, a delay time is provided in a logic input rising.