IP Library Granted Patent US 7,849,436
Granted Patent B2
US 7,849,436 · App. 11/889,384 · Granted Dec 7, 2010

Method of forming dummy pattern

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Quick Facts
Patent No.
US 7,849,436
App. No.
11/889,384
Granted
Dec 7, 2010
Kind
B2
Abstract

A method of forming a dummy pattern on a mask for fabricating a semiconductor device is disclosed. The method may include a step of calculating a distance in a device isolation area between a first chip area and a second chip area having different pattern densities. In addition, the method may include comparing the distance and a first reference distance. The method may further include forming the dummy pattern in the device isolation area based on the comparison result. The dummy pattern may have a plurality of partitions. Each of the plurality of partitions may have a pattern density according to a position of the partition. A quantity of the partitions may be based on the comparison result. And at least one partition may have a pattern density which is substantially equal to an average of the pattern densities of the first and the second chip areas.

Claims (30)

1. A method of forming a dummy pattern on a mask for fabricating a semiconductor device, the method comprising:

calculating a separation distance in a device isolation area between first and second chip areas having different pattern densities;

comparing the separation distance and a first reference distance to determine whether or not the separation distance is larger than the first reference distance;

forming the dummy pattern in the device isolation area based on the comparison result, wherein:

the dummy pattern has a plurality of partitions;

the partitions have pattern densities according to a position of the respective partition;

a quantity of the partitions is based on the comparison result; and

at least one partition has a pattern density which is substantially equal to an average of the pattern densities of the first and the second chip areas.

2. The method according to claim 1 , wherein the quantity of the partitions is in the range of three to nine.

3. The method according to claim 2 , when the separation distance is larger than the first reference distance, forming the dummy pattern into first, second, third, fourth, and fifth partitions, wherein:

the third partition has a pattern density which is substantially equal to an average of the pattern densities of the first and second chip areas;

the first partition and the second partition have relatively lower pattern densities than the pattern density of the third partition; and

the fourth partition and the fifth partition have relatively higher pattern densities than the pattern density of the third partition.

4. The method according to claim 3 , wherein:

the first chip area has a lower pattern density than the second chip area;

a first group of partitions, including the first and the second partitions, is adjacent to the first chip area;

a second group of partitions, including the fourth and the fifth partitions, is adjacent to the second chip area; and

the third partition is positioned between the first group and the second group.

5. The method according to claim 2 , wherein:

when the separation distance is not larger than the first reference distance, judging whether or not the separation distance is larger than a second reference distance, the second reference distance being smaller than the first reference distance,

when the separation distance is larger than the second reference distance, forming the dummy pattern into first, second, and third partitions, wherein:

the second partition has a pattern density which is substantially equal to an average of the pattern densities of the first chip area and the second chip area;

the first partition has a relatively lower pattern density than the pattern density of the second partition; and

the third partition has a relatively higher pattern density than the pattern density of the second partition.

6. The method according to claim 5 , wherein if the separation distance is not larger than the second reference distance, forming the dummy pattern with a uniform pattern density.

7. The method according to claim 5 , wherein:

the first chip area has a lower pattern density than the second chip area;

the first partition is adjacent to the first chip area;

the third partition is adjacent to the second chip area; and

the second partition is positioned between the first partition and the third partition.

Assignments (7)
CHANGE OF NAME Recorded Nov 19, 2025
From: TESSERA ADVANCED TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.
Reel/Frame 073635/0304 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2015
From: STRATEGIC GLOBAL ADVISORS OF OREGON, INC.
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 035620/0771 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2015
From: DONGBU HITEK CO., LTD.
To: STRATEGIC GLOBAL ADVISORS OF OREGON, INC.
Reel/Frame 035491/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2007
From: CHOI, JAE YOUNG
To: DONGBU HITEK CO., LTD.
Reel/Frame 019752/0140 →