Differential ring oscillator

1. A ring oscillator comprising a plurality of differential amplifier circuits connected in a loop, each of the differential amplifier circuits comprising:

a differential transistor pair composed of first and second transistors;

a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; and

second and third resistances provided between the first and second transistors, respectively, and a second voltage node,

wherein the first to third resistances are all negative resistance elements for temperature compensation.

2. The ring oscillator of claim 1 , wherein each of the plurality of differential amplifier circuits further comprises first and second passive circuits connected to the second and third resistances, respectively, the load characteristics of the passive circuits changing according to a control signal supplied.

3. The ring oscillator of claim 2 , wherein the first and second passive circuits are both variable resistance circuits whose resistance value changes according to the control signal or variable capacitance circuits.

4. The ring oscillator of claim 1 , wherein each of the plurality of differential amplifier circuits further comprises a variable resistance circuit connected to the first resistance, the resistance value of the variable resistance circuit changing according to a control signal supplied.

5. A semiconductor integrated circuit comprising:

the ring oscillator of claim 2 ;

a phase comparator for comparing a phase of an output signal of the ring oscillator with a phase of a reference signal;

a counter for counting up or down based on the result of the phase comparison, the counter starting the counting from an initial value and retaining a current count value when the counter stops the counting; and

a control signal generation section for generating the control signal according to the count value of the counter.

6. The semiconductor integrated circuit of claim 5 , further comprising:

a first interface for inputting/outputting a value from/to an external memory for retaining the value supplied;

a control section for instructing the counter to start or stop counting and transferring a value between the counter and the external memory via the first interface when the counting of the counter is at rest; and

a second interface for outputting an oscillating signal from the ring oscillator externally,

wherein when receiving a count value from the control section, the counter retains the received count value.

7. The semiconductor integrated circuit of claim 5 , further comprising:

an interface for inputting/outputting a value from/to an external memory for retaining the value supplied;

a control section for instructing the counter to start or stop counting and transferring a count value between the counter and the external memory via the interface when the counting of the counter is at rest; and

a RF circuit operating in response to an oscillating signal from the ring oscillator,

wherein when receiving a count value from the control section, the counter retains the received count value.

8. The semiconductor integrated circuit of claim 5 , further comprising:

a memory for retaining a value supplied; and

a control section for instructing the counter to start or stop counting and transferring a count value between the counter and the memory when the counting of the counter is at rest,

wherein when receiving a count value from the control section, the counter retains the received count value.

9. The semiconductor integrated circuit of claim 8 , further comprising

an interface for outputting an oscillating signal from the ring oscillator externally.

10. The semiconductor integrated circuit of claim 8 , further comprising

a RF circuit operating in response to an oscillating signal from the ring oscillator.

11. An electronic device comprising:

the semiconductor integrated circuit of claim 6 ;

the memory; and

a RF circuit operating in response to the oscillating signal outputted via the second interface.

12. An electronic device comprising:

the semiconductor integrated circuit of claim 7 ; and

the memory.

13. An electronic device comprising:

the semiconductor integrated circuit of claim 9 ; and

a RF circuit operating in response to the oscillating signal outputted via the interface.

14. An electronic device comprising:

the semiconductor integrated circuit of claim 10 .