Wake-up controller and a method therefor for power control over peripheral circuitry based upon slots of a data field
View Patent ↗In a wake-up control device for waking up a peripheral circuit such as a transmitter/receiver in a radio communication device, during a standby time in which an RF unit and a processing unit are powered off by a switch, an RF signal is received to produce a detection signal by a detector. The detection signal is transferred to the wake-up controller to be sampled. The header and other fields are detected and counted. A control signal is in turn produced by the respective counts to turn on the switch.
1. A wake-up control device comprising:
a detector for receiving a predetermined frequency signal to produce a detection signal;
a controller operative in response to the detection signal for producing a control signal performing a wake-up control;
a switch circuit operative in response to said controller for using at least the predetermined frequency signal to power on or off a transmitter/receiver transmitting or receiving information;
said controller sampling the detection signal to turn on or off said switch circuit based on a number of slots in a header field and a data field forming a frame of the predetermined frequency signal;
a sampling circuit operative in response to the header field detected for producing a first count-up signal, and operative in response to a field detected other than the header field for producing a second count-up signal;
a first detection counter for counting the first count-up signal;
a second detection counter for counting the second count-up signal; and
a decision circuit operative in response to a count in said first and second detection counters for determining whether said switch circuit is to be turned on or off;
wherein said controller comprises a shift register for shifting the detection signal by one stage and two stages to produce a first and a second detection signal, and for producing a logical AND of the first and second detection signals,
said sampling circuit using the logical AND to produce the first and second count-up signals.
2. The device in accordance with claim 1 , wherein said decision circuit comprises a timer for measuring time to perform a pattern check more than once for the detection signal, said decision circuit producing a control signal controlling to turn on said switch circuit after performing the pattern check more than once.
3. The device in accordance with claim 1 , wherein said decision circuit comprises a pattern check counter for checking a periodical transition of the detection signal between a low level and a high level, said decision circuit producing a control signal controlling to turn on said switch circuit based on a frame pattern other than a pattern changing in a short period.
4. The device in accordance with claim 1 , wherein said switch circuit is connected to a processor for processing a radio communication service, said switch circuit being responsive to the control signal to supply said processor with an electric power.
5. The device in accordance with claim 1 , wherein the predetermined frequency signal is of a radio frequency.
6. The device in accordance with claim 1 , wherein said detector detects a radio frequency signal of Dedicated Short Range Communications (DSRC), said transmitter/receiver transmitting or receiving the radio frequency signal of DSRC.
7. The device in accordance with claim 1 , wherein said wake-up controller is powered by a battery.
8. A method for wake-up control comprising the steps of:
receiving a predetermined frequency signal to produce a detection signal;
producing a control signal to perform a wake-up control in response to the detection signal;
using at least the predetermined frequency signal in response to the control signal to power on or off a transmitter/receiver transmitting or receiving information;
sampling the detection signal to power on or off the transmitter/receiver based on a number of slots of a header field and a data field forming a frame of the predetermined frequency signal;
detecting the header field to produce a first count-up signal, and detecting a field other than the header field to produce a second count-up signal;
counting the first and second count-up signals;
powering on or off the transmitter/receiver based on a count obtained in said step of counting;
shifting the detection signal by one stage and two stages to produce a first and a second detection signal; and
producing a logical AND of the first and second detection signals; and
using the logical AND to produce the first and second count-up signals.
9. The method in accordance with claim 8 , further comprising the steps of:
measuring time to perform a pattern check more than once for the detection signal; and
performing the pattern check more than once and thereafter powering on or off the transmitter/receiver.
10. The method in accordance with claim 8 , further comprising the steps of:
performing pattern check of checking a periodical transition of the detection signal between a low level and a high level to thereby exclude a pattern changing in a short period from a frame pattern; and
powering on or off the transmitter/receiver based on a frame pattern excluding the pattern changing in the short period.