IP Library Granted Patent US 8,086,928
Granted Patent B2
US 8,086,928 · App. 11/893,329 · Granted Dec 27, 2011

Methods and systems for terminating an iterative decoding process of a forward error correction block

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,086,928
App. No.
11/893,329
Granted
Dec 27, 2011
Kind
B2
Abstract

The invention provides methods and systems for terminating an iterative decoding process of a Forward Error Correction block (FEC). The iterative decoding process of the FEC block is terminated upon determining that the FEC block cannot be decoded successfully. A method comprises calculating a metric based on one or more Log Likelihood Ratios (LLRs) corresponding to a first number of iterations of the iterative decoding process of the FEC block. The method further comprises, formulating one or more stopping criteria for the iterative decoding process based on a variation pattern of the metric over a second predetermined number of iterations of the iterative decoding process. The second predetermined number of iterations is a subset of the first number of iterations. Moreover, the method comprises terminating the iterative decoding process of the FEC block based on the one or more stopping criteria.

Claims (48)

1. A method for terminating an iterative decoding process of a Forward Error Correction (FEC) block, the method comprising:

calculating, in a decoder, a metric based on one or more Log Likelihood Ratios (LLRs) corresponding to a first number of iterations of the iterative decoding process of the FEC block;

formulating, in the decoder, one or more stopping criteria for the iterative decoding process based on a variation pattern of the metric over a second number of iterations of the iterative decoding process, wherein the second number of iterations is a subset of the first number of iterations; and

terminating, in the decoder, the iterative decoding process of the FEC block based on the one or more stopping criteria.

2. The method of claim 1 , wherein the terminating further comprises:

estimating whether the FEC block is a successfully decoded FEC block, based on an independent success criterion; and

terminating the iterative decoding process when the FEC block is estimated to be the successfully decoded FEC block.

3. The method of claim 1 , wherein the first number of iterations and the second number of iterations comprises at least one of a half iteration and a full iteration.

4. The method of claim 1 , wherein the metric is a Mean Absolute Log-Likelihood Ratio (MALLR) corresponding to the first number of iterations of the iterative decoding process of the FEC block.

5. The method of claim 4 , wherein the MALLR is computed over one or more pairs of successive half iterations of the iterative decoding process of the FEC block, the one or more pairs of successive half iterations belonging to the first number of iterations.

6. The method of claim 1 , wherein the metric is a sum of absolute LLRs corresponding to the first number of iterations of the iterative decoding process of the FEC block.

7. The method of claim 1 , wherein the metric is calculated from the one or more LLRs of a predetermined number of bits of the FEC block.

8. The method of claim 1 , wherein the one or more stopping criteria comprises checking a flatness of the variation pattern of the metric, wherein checking a flatness of the variation pattern of the metric comprises:

determining over the second number of iterations of the iterative decoding process, whether a difference between a minimum metric value and a maximum metric value of the metric is less than or equal to a first predefined threshold.

9. The method of claim 8 , wherein the first predefined threshold is based on at least one of a front end scaling factor and a Signal to Interference Noise Ratio (SINR) estimate corresponding to the FEC block.

10. The method of claim 1 , wherein the one or more stopping criteria comprises checking a flatness of the variation pattern of the metric, wherein checking a flatness of the variation pattern of the metric comprises:

checking whether an increment in the metric is less than or equal to a predefined increment threshold;

checking whether a ratio between two or more successive metrics is less than or equal to a predefined successive ratio threshold;

checking whether a local slope of the metric is less than or equal to a predefined local slope threshold, the local slope being computed over a third number of iterations, wherein the third number of iterations is less than or equal to the second number of iterations; and

checking whether a global slope of the metric is less than or equal to a predefined global threshold, the global slope being computed over the first number of iterations of the iterative decoding process.

11. The method of claim 1 , wherein the one or more stopping'criteria comprises identifying a non-increasing nature of the metric, identifying a non-increasing nature of the metric comprising:

checking, over the second number of iterations of the iterative decoding process, whether a net increase in the metric is less than or equal to a second predefined threshold.

12. The method of claim 1 , wherein calculating the metric includes calculating the metric at each iteration of the first number of iterations.

13. The method of claim 1 , wherein a number of the second number of iterations is determined during the iterative decoding process.

14. A method for stopping an iterative decoding process of a Forward Error Correction (FEC) block, the method comprising:

receiving, at a decoder, a stopping indication, the stopping indication being generated based on one or more stopping criteria, wherein the one or more stopping criteria includes:

identifying, in a decoder, a non-increasing nature of a variation pattern of a metric by checking, over a second number of iterations of the iterative decoding process, whether a net increase in the metric is less than or equal to a predefined threshold, the metric being calculated based on one or more Log Likelihood Ratios (LLRs) corresponding to a first number of iterations of a predetermined number of bits of the FEC block; and

stopping the iterative decoding process of the FEC block based on the stopping indication.

15. A device for terminating an iterative decoding process of a Forward Error Correction (FEC) block, the device comprising:

a memory configured to store at least one of a first predefined threshold, a second predefined threshold, a predefined increment threshold, a predefined successive ratio threshold, a predefined local slope threshold, and a predefined global threshold; and

a processor operatively coupled to the memory, the processor configured to

calculate a metric based on a Log Likelihood Ratio (LLR) corresponding to a first number of iterations of a predetermined number of bits of the FEC block;

formulate one or more stopping criteria for the iterative decoding process of the FEC block based on a variation pattern of the metric over a second number of iterations of the iterative decoding process, wherein the second number of iterations is a subset of the first number of iterations; and

terminate the iterative decoding process of the FEC block based on the one or more stopping criteria.

16. The device of claim 15 , wherein the processor is further configured to

check a flatness of the variation pattern of the metric; or

identify a non-increasing nature of the variation pattern of the metric.

17. The device of claim 16 , wherein, to check the flatness of the variation pattern of the metric, the processor is further configured to

determine, over the second predetermined number of iterations of the iterative decoding process, whether a difference between a minimum metric value and a maximum metric value of the metric is less than or equal to the first predefined threshold, wherein the first predefined threshold is based on at least one of a front end scaling factor and a Signal to Interference Noise Ratio (SINR) estimate corresponding to the FEC block.

18. The device of claim 16 , wherein, to check the flatness of the variation pattern of the metric, the processor is further configured to

check whether an increment in the metric is less than or equal to the predefined increment threshold;

check whether a ratio between two or more successive metrics is less than or equal to the predefined successive ratio threshold;

check whether a local slope of the metric is less than or equal to the predefined local slope threshold, the local slope being computed over a third number of iterations wherein the third number of iterations is less than or equal to the second number of iterations; and

check whether a global slope of the metric is less than or equal to the predefined global threshold, the global slope being computed over the first number of iterations of the iterative decoding process.

19. The device of claim 16 , wherein, to identify the non-increasing nature of the variation pattern of the metric, the processor is further configured to

check, over the second number of iterations of the iterative decoding process, whether a net increase in the metric is less than or equal to a second predefined threshold.

20. The device of claim 15 , wherein the processor is configured to calculate the metric at each iteration of the first number of iterations.

21. The device of claim 15 , wherein a number of the second number of iterations is determined during the iterative decoding process.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2010
From: BECEEM COMMUNICATIONS, INC.
To: BROADCOM CORPORATION
Reel/Frame 025473/0591 →