IP Library Granted Patent US 8,779,584
Granted Patent B2
US 8,779,584 · App. 11/896,153 · Granted Jul 15, 2014

Semiconductor apparatus

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Quick Facts
Patent No.
US 8,779,584
App. No.
11/896,153
Granted
Jul 15, 2014
Kind
B2
Abstract

A semiconductor apparatus equipped with at least one semiconductor element includes a metallic plate bonded to an upper surface of the semiconductor element and a conductor plate, bonded to the metallic plate and serving as an electric current path of the semiconductor apparatus. The conductor plate and the metallic plate are bonded to each other by laser welding at a part other than a part directly above the semiconductor element. As a result, heat damage caused by laser welding can be reduced.

Claims (22)

1. A semiconductor apparatus comprising:

at least two semiconductor elements;

a metallic plate bonded to upper surfaces of the at least two semiconductor elements; and

a conductor plate bonded to said metallic plate and serving as an electric current path of the semiconductor apparatus,

wherein said conductor plate and said metallic plate are bonded to each other at a part other than a part directly above the at least two semiconductor elements.

2. A semiconductor apparatus according to claim 1 , wherein said metallic plate has a side edge portion located at a side of the semiconductor elements, said conductor plate and said metallic plate being bonded to each other by laser welding at the side edge portion.

3. A semiconductor apparatus according to claim 1 , wherein said metallic plate and said conductor plate have a bonding surface therebetween, said bonding surface being located at a level higher than an upper surface of said metallic plate located directly above the at least two semiconductor elements.

4. The semiconductor apparatus according to claim 1 , wherein the conductor plate and the metallic plate are bonded to each other by laser welding.

5. The semiconductor apparatus according to claim 1 , further comprising a solder layer arranged between the semiconductor element and the metal plate.

6. The semiconductor apparatus according to claim 5 , wherein the conductor plate covers a first portion of an upper surface of the metallic plate such that a second portion of the upper surface of the metallic plate is exposed so as to dissipate heat generated by the at least two semiconductor elements.

7. A semiconductor apparatus comprising:

adjacent semiconductor elements;

one metallic plate bonded to upper surfaces of the adjacent semiconductor elements; and

a conductor plate bonded to said metallic plate and serving as an electric current path of the semiconductor apparatus,

wherein said conductor plate and said metallic plate are bonded to each other at a part directly above a midsection between the adjacent semiconductor elements.

8. A semiconductor apparatus according to claim 7 , wherein said metallic plate has a block shape and includes a groove at a bottom surface of said metallic plate corresponding to the midsection between the adjacent semiconductor elements.

9. A semiconductor apparatus according to claim 7 , wherein said metallic plate is a rectangular parallelepiped.

10. A semiconductor apparatus according to claim 7 , wherein said metallic plate includes a projecting portion at a part corresponding to the midsection between the adjacent semiconductor elements, said projecting portion and said conductor plate being bonded to each other by laser welding.

11. A semiconductor apparatus according to claim 10 , wherein said metallic plate has a three-dimensional structure and includes a projecting portion, said projecting portion and said conductor plate being bonded to each other directly by the laser welding.

12. The semiconductor apparatus according to claim 7 , wherein the conductor plate and the metallic plate are bonded to each other by laser welding.

13. The semiconductor apparatus according to claim 7 , further comprising a solder layer arranged between the semiconductor element and the metal plate.

14. The semiconductor apparatus according to claim 13 , wherein the conductor plate covers a first portion of an upper surface of the metallic plate, such that a second portion of the upper surface of the metallic plate is exposed so as to dissipate heat generated by the adjacent semiconductor elements.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Aug 26, 2011
From: FUJI ELECTRIC SYSTEMS CO., LTD. (FES); FUJI TECHNOSURVEY CO., LTD. (MERGER BY ABSORPTION)
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 026970/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2010
From: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
To: FUJI ELECTRIC SYSTEMS CO., LTD.
Reel/Frame 024252/0438 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2007
From: YOKOMAE, TOSHIYUKI; UEYANAGI, KATSUMICHI; MOCHIZUKI, EIJI; IKEDA, YOSHINARI
To: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.
Reel/Frame 020009/0789 →