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App. No. 11/896,356 · Confirmation No. 5273

Power supply wiring configuration in semiconductor integrated circuit

Inventor: Tadahiro Shimizu
Abandoned -- Failure to Respond to an Office Action View Publication ↗
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2010-10-04 ABN Abandonment 2 View
2010-02-05 CTRS Requirement for Restriction/Election 5 View
2010-02-05 FWCLM Index of Claims 1 View
2008-03-06 NTC.PUB Notice of Publication 1 View
2008-02-07 PD.FILED.E Priority Documents electronically retrieved by USPTO from a participating IP Office 19 View
2007-09-28 APP.FILE.REC Filing Receipt 3 View
2007-08-31 TRNA Transmittal of New Application 2 View
2007-08-31 SPEC Specification 18 View
2007-08-31 CLM Claims 5 View
2007-08-31 ABST Abstract 1 View
2007-08-31 DRW Drawings-only black and white line drawings 6 View
2007-08-31 OATH Oath or Declaration filed 2 View
2007-08-31 136A Authorization for Extension of Time all replies 2 View
2007-08-31 IDS Information Disclosure Statement (IDS) Form (SB08) 3 View
2007-08-31 FOR Foreign Reference 2 View
2007-08-31 FRPR Certified Copy of Foreign Priority Application 21 View
2007-08-31 WFEE Fee Worksheet (SB06) 1 View
2007-08-31 WFEE Fee Worksheet (SB06) 1 View
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Quick Facts
App. No.
11/896,356
Filed
2007-08-31
Pub. No.
US20080054307A1
Examiner
VU, HUNG K
Art Unit
2811