IP Library Granted Patent US 7,711,917
Granted Patent B2
US 7,711,917 · App. 11/896,668 · Granted May 4, 2010

Semiconductor device and IC card

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Quick Facts
Patent No.
US 7,711,917
App. No.
11/896,668
Granted
May 4, 2010
Kind
B2
Abstract

A semiconductor device according to the present invention comprises a first non-volatile memory, a second non-volatile memory in which initial data is stored, and an initialization controller for initializing the first non-volatile memory, wherein the second non-volatile memory has anti-stress properties higher than those of the first non-volatile memory, and the initialization controller reads the initial data from the second non-volatile memory when the first non-volatile memory is initialized and copies the read initial data in the first non-volatile memory to thereby initialize the first non-volatile memory.

Claims (43)

1. A semiconductor device comprising:

a first non-volatile memory;

a second non-volatile memory in which initial data is stored; and

an initialization controller for initializing the first non-volatile memory, wherein

the second non-volatile memory has anti-stress properties higher than those of the first non-volatile memory, and

the initialization controller reads the initial data from the second non-volatile memory when the first non-volatile memory is initialized and copies the read initial data in the first non-volatile memory to thereby initialize the first non-volatile memory.

2. The semiconductor device as claimed in claim 1 , wherein

the initialization controller comprises:

a reader for reading the initial data from the second non-volatile memory; and

a writer for writing the read initial data into the first non-volatile memory.

3. The semiconductor device as claimed in claim 2 , wherein

the initialization controller further comprises a data processor, wherein

the data processor executes a computing processing to the initial data read from the second non-volatile memory by the reader and supplies a result of the processing to the writer.

4. The semiconductor device as claimed in claim 1 , wherein

the initialization controller invalidates a part of functions installed in the semiconductor device until the initialization of the first non-volatile memory by copying the initial data therein is completed and sets an initialization permission flag showing permission/prohibition of the initialization to a permitted state, and

the initialization controller further shifts the initialization permission flag to a prohibited state upon the completion of the initialization of the first non-volatile memory by copying the initial data therein.

5. The semiconductor device as claimed in claim 4 , wherein

the initialization controller prohibits access to

a part or all of addresses in the second non-volatile memory when the initialization permission flag is shifted to the prohibited state.

6. The semiconductor device as claimed in claim 1 , wherein

a transfer destination address information is stored in the second non-volatile memory in association with the initial data, and

the initialization controller stores the initial data read from the second non-volatile memory at an address in the first non-volatile memory designated by the transfer destination address information.

7. An IC card comprising:

the semiconductor device as claimed in claim 1 ;

a transmitting/receiving circuit for performing communication with a reader/writer provided outside; and

a control circuit for controlling the initialization controller in the semiconductor device in accordance with a command received by the transmitting/receiving circuit and making the initialization controller to read the initial data from the second non-volatile memory and initialize the first non-volatile memory by copying the read initial data therein.

8. A method of initializing a semiconductor device comprising:

a step of providing a first non-volatile memory and a second non-volatile memory having anti-stress properties higher than those of the first non-volatile memory in the semiconductor device;

a step of storing initial data in the second non-volatile memory; and

a step of initializing the first non-volatile memory by reading the initial data from the second non-volatile memory and copying the read initial data in the first non-volatile memory.

9. The method of initializing a semiconductor device as claimed in claim 8 , wherein

the step of initializing the first non-volatile memory is performed after processing which applies a stress to the semiconductor device is executed to the semiconductor device.

10. The method of initializing a semiconductor device as claimed in claim 8 , wherein

in the step of storing the initial data,

a part of functions installed in the semiconductor device is invalidated and an initialization permission flag showing permission/prohibition of the initialization is set to a permitted state in a state where the initialization of the first non-volatile memory by copying the initial data therein is not yet completed, and

the initialization permission flag is set to a prohibited state in response to the completion of the initialization of the first non-volatile memory by copying the initial data therein.

11. The method of initializing a semiconductor device as claimed in claim 10 , wherein

it is disallowed to access a part or all of addresses in the second non-volatile memory when the initialization permission flag is shifted to the prohibited state in the step of storing the initial data.

12. The method of initializing a semiconductor device as claimed in claim 8 , wherein

a transfer destination address information is stored in the second non-volatile memory in association with the initial data in the step of storing the initial data, and

the initial data read from the non-volatile memory is stored at an address in the first non-volatile memory designated by the transfer destination address information in the step of initializing the first non-volatile memory.

13. The method of initializing a semiconductor device as claimed in claim 8 , wherein

a computing processing is executed to the initial data read from the second non-volatile memory, a result of the computation is copied in the first non-volatile memory so that the first non-volatile memory is initialized in the step of initializing the first non-volatile memory.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2014
From: PANASONIC CORPORATION (FORMERLY MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.)
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 032152/0514 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2008
From: YOSHIOKA, KAZUKI; NAKANE, GEORGE; MANO, YOSHITAKA
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020553/0784 →