IP Library Granted Patent US 7,615,416
Granted Patent B1
US 7,615,416 · App. 11/897,569 · Granted Nov 10, 2009

Secure package with anti-tamper peripheral guard ring

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Quick Facts
Patent No.
US 7,615,416
App. No.
11/897,569
Granted
Nov 10, 2009
Kind
B1
Abstract

A ball grid array (BGA) package (such as one BGA package of a package-on-package (POP) secure module assembly) includes a substrate, and integrated circuit, and array of bond balls. The BGA package further includes a first amount of encapsulant that covers the integrated circuit and a novel second amount of encapsulant. The novel second amount of encapsulant is a peripheral strip that extends along an edge of the substrate to form a peripheral guard ring. The peripheral guard ring provides an additional amount of anti-tamper security to the BGA package. The guard ring can be fabricated with no or very little additional cost if the guard ring is formed in the same encapsulation step employed to encapsulate the integrated circuit. In some embodiments, the peripheral guard ring is made part of and/or is coupled to anti-tamper circuitry such that if the guard ring is disturbed a tamper condition is detected.

Claims (28)

1. A method comprising:

(a) fixing an integrated circuit die to a substrate, wherein the integrated circuit die includes tamper-detect circuitry and wherein the substrate includes an anti-tamper mesh of conductors; and

(b) in a single step, placing an encapsulant material onto a first side of the substrate and onto the integrated circuit die such that a first amount of the encapsulant material covers the integrated circuit die, and such that a second amount of the encapsulant material is disposed on the first side of the substrate so that the second amount of encapsulant forms a ring structure that surrounds the first amount of encapsulant, wherein the first and second amounts of encapsulant are separate amounts of encapsulant that do not contact one another.

2. The method of claim 1 , further comprising:

(c) forming a grid array of bond balls so that the ring structure surrounds the grid array of bond balls, wherein each bond ball of the grid array is attached to the first side of the substrate.

3. The method of claim 1 , further comprising:

(c) attaching bond balls to the first side of the substrate so that the bond balls form a grid array of bond balls and so that the ring structure surrounds the grid array of bond balls.

4. The method of claim 1 , wherein step (b) involves screen printing the encapsulant onto the substrate.

5. The method of claim 1 , wherein the encapsulant is an epoxy-resin material.

6. The method of claim 2 , wherein the bond balls extend away from the first side of the substrate a first distance, wherein the ring structure extends away from the first side of the substrate a second distance, wherein the second distance greater than half the first distance but is less than the first distance.

7. The method of claim 1 , wherein the substrate is a printed circuit board that includes multiple layers of conductors.

8. An apparatus comprising:

a ball grid array (BGA) integrated circuit package including a substrate, an integrated circuit die, an array of bond balls that extends in two perpendicular directions in a plane, and a first amount of an encapsulant that covers the integrated circuit die, wherein the integrated circuit die is fixed to a first side of the substrate, and wherein the array of bond balls is fixed to the first side of the substrate; and

means for surrounding the integrated circuit die in the plane with a second amount of an encapsulant, wherein the second amount of the encapsulant does not contact the first amount of the encapsulant.

9. The apparatus of claim 8 , wherein the means is a ring of the encapsulant, wherein the ring extends along a peripheral edge of the substrate.

10. The apparatus of claim 8 , wherein the encapsulant of the first amount of encapsulant is a first type of encapsulant material, and wherein the encapsulant of the second amount of encapsulant is a second type of encapsulant material.

11. The apparatus of claim 8 , wherein the means comprises a conductor that is in contact with the encapsulant, wherein the integrated circuit includes tamper detect circuitry, and wherein the conductor is coupled to the tamper detect circuitry.

12. The method of claim 1 , wherein the tamper-detect circuitry is coupled to the anti-tamper mesh of conductors.

13. The method of claim 2 , wherein none of the second amount of the encapsulant material extends between any two adjacent ones of the bond balls of the grid array of bond balls.

14. The method of claim 3 , wherein the first amount of the encapsulant material does not cover any of the bond balls.

15. The method of claim 3 , wherein the substrate, the grid array of bond balls, the integrated circuit die, the first amount of the encapsulant material, and the second amount of the encapsulant material together are a ball grid array (BGA) integrated circuit package having a guard ring.

16. The method of claim 1 , wherein the first side of the substrate extends in a first plane, wherein the first amount of the encapsulant material has an exposed and substantially planar surface that extends in a second plane parallel to the first plane, and wherein the ring structure has an exposed and substantially planar surface that extends in the second plane.

17. The method of claim 1 , wherein the second amount of the encapsulant material conceals and contacts a tamper-detect conductor, wherein the tamper-detect conductor is electrically coupled to the integrated circuit die.

18. The method of claim 1 , wherein the second amount of the encapsulant material contacts a conductor, and wherein the conductor is coupled to the tamper-detect circuitry.

19. The method of claim 1 , wherein the encapsulant material is electrically conductive.

20. The apparatus of claim 8 , wherein the first side of the substrate includes an array of lands, and wherein the bond balls are fixed to the array of lands.

21. The apparatus of claim 8 , wherein the substrate is a printed circuit board that includes multiple layers of conductors.

22. The apparatus of claim 8 , wherein the substrate is a rigid printed circuit board.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2009
From: ZILOG, INC.; ZILOG INTERNATIONAL, LTD.
To: MAXIM INTEGRATED PRODUCTS, INC.
Reel/Frame 022892/0099 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2007
From: CHOCK, RAYMOND O.
To: ZILOG, INC.
Reel/Frame 019814/0898 →