IP Library Granted Patent US 8,486,832
Granted Patent B2
US 8,486,832 · App. 11/898,140 · Granted Jul 16, 2013

Method for fabricating semiconductor device

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Quick Facts
Patent No.
US 8,486,832
App. No.
11/898,140
Granted
Jul 16, 2013
Kind
B2
Abstract

A trench is formed in an interlayer dielectric formed on a substrate, then a barrier seed film is formed to cover the interlayer dielectric and the inner walls of the trench, and copper is embedded in the trench by electrolytic plating using the barrier seed film as an electrode. The barrier seed film is a single-layer film made of an oxide or nitride of a refractory metal and contains a low-resistance metal other than copper.

Claims (14)

1. A method for fabricating a semiconductor device, the method comprising steps of:

forming a trench in an interlayer dielectric formed on a substrate;

forming a barrier seed film to cover the interlayer dielectric and inner walls of the trench; and

embedding copper in the trench by forming the copper directly on a surface of the barrier seed film by electrolytic plating using the barrier seed film as an electrode, wherein:

the barrier seed film is a single-layer film made of an oxide of at least one metal of Zn, Ti, Zr, Hf, Nd, Ta, W, V, Mo, Mn, Ru, Os, Co, Rh and Ir, and contains a low-resistance metal other than copper as a dopant to provide conductivity to the barrier seed film,

the step of forming the barrier seed film includes a step of doping the low-resistance metal in the barrier seed film so that a concentration of the low-resistance metal in the vicinity of an interface of the barrier seed film in contact with the copper embedded in the trench is higher than a concentration of the low-resistance metal in the vicinity of an interface of the barrier seed film in contact with the interlayer dielectric, and

the low-resistance metal is any one of Al, Ag and Au.

2. The method of claim 1 , wherein

an amount of the low-resistance metal doped in the oxide is within the range of 0.1 at % through 25 at %.

3. The method of claim 1 , wherein

the oxide of the metal is ZnO, and the low-resistance metal is Al.

4. The method of claim 1 , wherein

the copper embedded in the trench forms a via or interconnect.

5. The method of claim 1 , wherein the barrier seed metal is formed by using an ALE method, an MBE method or an sputtering method with controlling of a supply amount of the low-resistance metal.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2008
From: MORINAGA, YASUNORI; NAKAGAWA, HIDEO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020554/0371 →