MSM binary switch memory
View Patent ↗A metal/semiconductor/metal (MSM) binary switch memory device and fabrication process are provided. The device includes a memory resistor bottom electrode, a memory resistor material over the memory resistor bottom electrode, and a memory resistor top electrode over the memory resistor material. An MSM bottom electrode overlies the memory resistor top electrode, a semiconductor layer overlies the MSM bottom electrode, and an MSM top electrode overlies the semiconductor layer. The MSM bottom electrode can be a material such as Pt, Ir, Au, Ag, TiN, or Ti. The MSM top electrode can be a material such as Pt, Ir, Au, TiN, Ti, or Al. The semiconductor layer can be amorphous Si, ZnO 2 , or InO 2 .
1. A metal/semiconductor/metal (MSM) binary switch memory device comprising:
a memory resistor bottom electrode;
a memory resistor material overlying the memory resistor bottom electrode;
a memory resistor top electrode overlying the memory resistor material;
an MSM bottom electrode overlying the memory resistor top electrode;
a semiconductor layer overlying the MSM bottom electrode, having a thickness in the range of 20 to 1000 nanometers; and,
an MSM top electrode overlying the semiconductor layer.
2. The MSM binary switch memory device of claim 1 wherein the memory resistor is a material selected from the group comprising Pr 0.3 Ca 0.7 MnO 3 (PCMO), colossal magnetoresistive (CMR) film, transition metal oxides, Mott insulators, high-temperature super conductor (HTSC), and perovskite materials.
3. The MSM binary switch memory device claim 1 wherein the MSM bottom electrode is a material selected from the group comprising Pt, Ir, Au, Ag, TiN, and Ti.
4. The MSM binary switch memory device of claim 1 wherein the MSM top electrode is a material selected from the group comprising Pt, Ir, Au, TiN, Ti, and Al.
5. The MSM binary switch memory device of claim 1 wherein the semiconductor layer overlying the MSM bottom electrode is a material selected from the group comprising amorphous Si, ZnO 2 , and InO 2 .
6. A metal/semiconductor/metal (MSM) binary switch crosspoint memory array comprising:
a first plurality of bit lines parallely aligned in a first direction;
a second plurality of MSM binary switch memory devices overlying each bit line;
a third plurality of word lines parallely aligned in a second direction, orthogonal to the first direction, each word line connected to each bit line through a unique intervening MSM binary switch memory device;
a memory resistor material overlying the bit line;
a memory resistor top electrode overlying the memory resistor material;
an MSM bottom electrode overlying the memory resistor top electrode;
a semiconductor layer overlying the MSM bottom electrode;
an MSM top electrode overlying the semiconductor layer at the intersection of the MSM binary switch memory device with the word line; and,
wherein the memory resistor is a material selected from the group comprising Pr 0.3 Ca 0.7 MnO 3 (PCMO), colossal magnetoresistive (CMR) film, transition metal oxides, Mott insulators, high-temperature super conductor (HTSC), and perovskite materials.
7. The MSM binary switch crosspoint memory array of claim 6 wherein the semiconductor layer has a thickness in the range of 20 to 1000 nanometers.
8. The MSM binary switch crosspoint memory array of claim 6 wherein the MSM bottom electrode is a material selected from the group comprising Pt, Ir, Au, Ag, TiN, and Ti.
9. The MSM binary switch crosspoint memory array of claim 6 wherein the MSM top electrode is a material selected from the group including Pt, Ir, Au, TiN, Ti, and Al.
10. The MSM binary switch crosspoint memory array of claim 6 wherein the semiconductor layer overlying the MSM bottom electrode is a material selected from the group comprising amorphous Si, ZnO 2 , and InO 2 .
11. A metal/semiconductor/metal (MSM) binary switch memory device comprising:
a memory resistor bottom electrode;
a memory resistor material overlying the memory resistor bottom electrode;
a memory resistor top electrode overlying the memory resistor material;
an MSM bottom electrode overlying the memory resistor top electrode;
a semiconductor layer overlying the MSM bottom electrode;
an MSM top electrode overlying the semiconductor layer; and,
wherein the memory resistor is a material selected from the group comprising Pr 0.3 Ca 0.7 MnO 3 (PCMO), colossal magnetoresistive (CMR) film, transition metal oxides, Mott insulators, high-temperature super conductor (HTSC), and perovskite materials.