Multi-mode parallel graphics rendering system (MMPGRS) embodied within a host computing system and employing the profiling of scenes in graphics-based applications

1 . A multi-mode parallel graphics rendering system (MMPGRS) embodied within a host computing system having (i) host memory space (HMS) for storing one or more graphics-based applications and a graphics library for generating graphics commands and data (GCAD) during the run-time of the graphics-based application, (ii) one or more CPUs for executing said graphics-based applications, and (iii) a display device for displaying images containing graphics during the execution of said graphics-based applications, said MMPGRS comprising:

a multi-mode parallel graphics rendering subsystem supporting multiple modes of parallel operation selected from the group consisting of object division, image division, and time division;

a plurality of graphic processing pipelines (GPPLs) supporting a parallel graphics rendering process that employs one or more of said object division, image division and/or time division modes of parallel operation in order to execute graphic commands and process graphics data, and render pixel-composited images containing graphics for display on a display device during the run-time of said graphics-based application; and

an automatic mode control module for automatically controlling the mode of parallel operation of said MMPGRS during the run-time of said graphics-based application.

2 . The MMPGRS of claim 1 , wherein said automatic mode control module employs the profiling of scenes in said graphics-based application.

3 . The MMPGRS of claim 1 , wherein said automatic mode control module employs the profiling of scenes in said graphics-based application, on an image frame by image frame basis.

4 . The MMPGRS of claim 2 , wherein said profiling of scenes in said graphics-based application, is carried out in real-time during run-time of said graphics-based application.

5 . The MMPGRS of claim 4 , wherein said profiling of scenes in said graphics-based application, is carried out in real-time, during run-time of said graphics-based application, on an image frame by image frame basis.

6 . The MMPGRS of claim 4 , wherein said real-time profiling of scenes in said graphics-based application involves (i) collecting and analyzing performance data associated with said MMPGRS and said host computing system, during application run-time, (ii) constructing scene profiles for the image frames associated with particular scenes in said particular graphics-based application, and (iii) maintaining said scene profiles in an application/scene profile database that is accessible to said automatic mode control module during run-time, so that during the run-time of said graphics-based application, said automatic mode control module can access and use said scene profiles maintained in said application/scene profile database and determine how to dynamically control the modes of parallel operation of said MMPGRS to optimize system performance.

7 . The MMPGRS of claim 2 , wherein said automatic mode control module employs real-time detection of scene profile indices directly programmed within pre-profiled scenes of said graphics-based application;

wherein said pre-profiled scenes are analyzed prior to run-time, and indexed with said scene profile indices; and

wherein and mode control parameters (MCPS) corresponding to said scene profile indices, are stored within a application/scene profile database accessible to said automatic mode control module during application run-time.

8 . The MMPGRS of claim 6 , wherein during run-time, said automatic mode control module automatically detects said scene profile indices and uses said detected said scene profile indices to access corresponding MCPs from said application/scene profile database so as to determine how to dynamically control the modes of parallel operation of said MMPGRS to optimize system performance.

9 . The MMPGRS of claim 2 , wherein said automatic mode control module employs real-time detection of mode control commands (MCCs) directly programmed within pre-profiled scenes of said graphics-based application;

wherein said pre-profiled scenes are analyzed prior to run-time, and said MCCs are directly programmed within the individual image frames of each scene; and

wherein during run-time, said automatic mode control module automatically detects said MCCs along the graphics command and data stream, and uses said MCCs so as to determine how to dynamically control the modes of parallel operation of said MMPGRS to optimize system performance.

10 . The MMPGRS of claim 1 , wherein said automatic mode control module employs a user interaction detection (UID) mechanism for real-time detection of the user's interaction with said host computing system.

11 . The MMPGRS of claim 10 , wherein, in conjunction with said scene profiling, said automatic mode control module also uses said UID mechanism to determine how to dynamically control the modes of parallel operation of the MMPGRS to optimize system performance, at any instance in time during run-time of said graphics-based application.

12 . The MMPGRS of claim 11 , wherein said UID mechanism analyzes user-system interaction data generated within said host computing system.

13 . The MMPGRS of claim 11 , wherein said user-system interaction data represents an event selected from the group consisting of mouse device movement, keyboard depressions, head movement, voice commands, eye movement, feet movement, and graphics-based application (e.g. game) updates originated over the LAN, WAN or Internet (WWW).

14 . The MMPGRS of claim 1 , wherein only one of said GPPLs is designated as the primary GPPL and is responsible for driving said display unit with a final pixel image composited within a frame buffer (FB) maintained by said primary GPPL, and all other GPPLs function as secondary GPPLs, supporting the pixel image recompositing process.

15 . The MMPGRS of claim 14 , wherein each said GPPL is a GPU-based GPPL which comprises:

(i) a video memory structure supporting a frame buffer including stencil, depth and color buffers, and

(ii) a graphics processing unit (GPU) supporting (1) a geometry subsystem having an input assembler, a vertex shader and a geometry shader, (2) a rasterizer, and (3) a pixel subsystem including a pixel shader receiving pixel data from said frame buffer and raster operators operating on pixel data in said frame buffer.

16 . The MMPGRS of claim 1 , wherein each said GPPL is a CPU-based GPPL which comprises:

(i) a video memory structure supporting a frame buffer including stencil, depth and color buffers; and

(ii) a graphics processing pipeline realized by one cell of a multi-core CPU chip, consisting of a plurality of processors.

17 . The MMPGRS of claim 16 , wherein said plurality of processors comprises a plurality of in-order SIMD processors.

18 . The MMPGRS of claim 16 , wherein said CPU-based GPPL further comprises:

(iii) a texture sampler for loading texture maps from memory, filtering said texture maps for level-of-detail, and feeding said texture maps to the pixel processing portion of said CPU-based GPPL.

19 . The MMPGRS of claim 1 , wherein said MMPGRS has system states selected from the group consisting of (i) parallel graphics rendering states, (ii) a non-parallel graphics rendering state, (iii) an application identification state, and (iv) a trial & error cycle state.

20 . The MMPGRS of claim 18 , wherein said parallel graphics rendering states include:

(i) an image division state attained when said MMPGRS is operating in said image division mode;

(i) an object division state attained when said MMPGRS is operating in said object division mode; and

(iii) a time division state attained when said MMPGRS is operating in said time division mode.

21 . The MMPGRS of claim 19 , wherein said non-parallel graphics rendering state is attained only when a single GPPL is operational during the graphics rendering process.

22 . The MMPGRS of claim 1 , wherein said display device is a device selected from the group consisting of an flat-type display panel, a projection-type display panel, and other image display devices.

23 . The MMPGRS of claim 1 , wherein said host computing system is a machine selected from the group consisting of a PC-level computer, information server, laptop, game console system, portable computing system, and any computational-based machine supporting the real-time generation and display of 3D graphics.