Computing system having a parallel graphics rendering system employing multiple graphics processing pipelines (GPPLS) dynamically controlled according to time, image and object division modes of parallel operation during the run-time of graphics-based applications running on the computing system

1 . A computing system having graphics rendering and display capabilities, comprising:

CPU space for storing one or more graphics-based applications and a graphics library for generating graphics commands and data (GCAD) during the run-time of the graphics-based application;

one or more CPUs for executing said graphics-based applications;

a display device for displaying images containing graphics during the execution of said graphics-based applications; and

a parallel graphics rendering subsystem supporting multiple modes of parallel operation selected from the group consisting of object division, image division, and time division, and including

(i) a plurality of graphic processing pipelines (GPPLs), supporting a parallel graphics rendering process that employs one or more of said object division, image division and/or time division modes of parallel operation in order to execute graphic commands and process graphics data, and render pixel-composited images containing graphics for display on a display device during the run-time of said graphics-based application; and

(ii) an automatic mode controller for automatically controlling the mode of parallel operation of said parallel graphics rendering subsystem during the run-time of said graphics-based application;

wherein each mode of parallel operation includes at least three stages, namely, decomposition, distribution and recomposition;

wherein said parallel graphics rendering subsystem comprises:

a decomposition module for supporting the decomposition stage of parallel operation;

a distribution module for supporting the distribution stage of parallel operation; and

a recomposition module for supporting the recomposition stage of parallel operation; and

wherein said GPPLs are controlled according to the modes of parallel operation instantiated during the run-time of said graphics-based application running on said computing system.

2 . The computing system of claim 1 , wherein only one of said GPPLs is designated as the primary GPPL and is responsible for driving said display unit with a final pixel image composited within a frame buffer (FB) maintained by said primary GPPL, and all other GPPLs function as secondary GPPLs, supporting the pixel image recompositing process.

3 . The computing system of claim 2 , wherein said display device includes a display area, and during said image division mode, said decomposition module splits up the image area into sub-images and prepares partition parameters for each said GPPL.

4 . The computing system of claim 3 , wherein said automatic mode controller determines the partition ratio based on load balancing considerations, and said distribution module carried out the physical distribution of said partition parameters among said multiple GPPLs.

5 . The computing system of claim 3 , wherein the stream of graphics commands and data (GCAD) is broadcasted to all said GPPLs for rendering, unless an end-of-frame is encountered, and

wherein when rendering of the frame is accomplished, each GPPL holds a different part of the entire image, and said recomposition module composites these parts into a final image by the moving all partial images (i.e. color FBs) from said secondary GPPLs to said primary GPPL, thereby merging the sub-images into the final color FB and displaying said final color FB on the display screen of said display device.

6 . The computing system of claim 2 , wherein during said time division mode, said decomposition module aligns a queue of GPPLs, appoints the next frame to the next available GPPL, and monitors the stream of graphics commands and data to all said GPPLs.

7 . The computing system of claim 6 , wherein said distribution module physically distributes said graphics command and data stream, and upon detection of an end-of-frame at one of said GPPLs, the control moves to said recomposition module which moves the color FB of the completing GPPL, to said primary GPPL, and said primary GPPL displays the image on the display screen of said display device.

8 . The computing system of claim 2 , wherein during said object division mode, said decomposition module intercepts graphics commands on their way between the standard graphics library and the vendor's GPU driver, and each graphics command is tested for a blocking operation class and a state operation class.

9 . The computing system of claim 8 , wherein whenever one of a blocking operation is issued, all said GPPLs are synchronized, and said distribution module physically sends the blocking command to all GPPLs.

10 . The computing system of claim 9 , wherein when a blocking mode command is detected, a blocking flag is set, and all frame buffers are composited and the result is duplicated to all GPPLs, and rendering of upcoming commands is mirrored (i.e. duplicated) at all of said GPPL, unless an end-of-blocking mode is detected.

11 . The computing system of claim 10 , wherein during compositing, a flushing command is sent to all GPPLs to flush said GGGLs, and then at each said GPPL, the color and Z Frame Buffer are read back to host memory, and all color Frame Buffers are composited based on Z and stencil buffers; and finally, the resulting Frame Buffer is sent to all said GPPLs.

12 . The computing system of claim 8 , wherein all successive graphics commands are duplicated (i.e. replicated) to all said GPPLs generating identical rendering results, unless the blocking mode flag is turned off, and when the end-of-blocking mode is detected, the blocking flag is turned off and regular object division is resumed.

13 . The MMPGRS of claim 2 , wherein when state operation commands are detected by said decomposition module, these commands are duplicated to all GPPLs, and upon detecting an end-of-frame, a compositing process is carried out with the merging result being sent to the display screen connected to said primary GPPL.

14 . The computing system of claim 1 , wherein said display device is a device selected from the group consisting of an flat-type display panel, a projection-type display panel, and other image display devices.

15 . The computing system of claim 1 , which is a machine selected from the group consisting of a PC-level computer, information server, laptop, game console system, portable computing system, and any computational-based machine supporting the real-time generation and display of 3D graphics.

16 . The computing system of claim 1 , wherein each said GPPL is a GPU-based GPPL which comprises:

(i) a video memory structure supporting a frame buffer including stencil, depth and color buffers, and

(ii) a graphics processing unit (GPU) supporting (1) a geometry subsystem having an input assembler, a vertex shader and a geometry shader, (2) a rasterizer, and (3) a pixel subsystem including a pixel shader receiving pixel data from said frame buffer and raster operators operating on pixel data in said frame buffer.

17 . The computing system of claim 1 , wherein each said GPPL is a CPU-based GPPL which comprises:

(i) a video memory structure supporting a frame buffer including stencil, depth and color buffers; and

(ii) a graphics processing pipeline realized by one cell of a multi-core CPU chip, consisting of a plurality of processors.

18 . The computing system of claim 17 , wherein said plurality of processors comprises a plurality of in-order SIMD processors.

19 . The computing system of claim 17 , wherein said CPU-based GPPL further comprises:

(iii) a texture sampler for loading texture maps from memory, filtering said texture maps for level-of-detail, and feeding said texture maps to the pixel processing portion of said CPU-based GPPL.