IP Library Granted Patent US 7,723,796
Granted Patent B2
US 7,723,796 · App. 11/902,568 · Granted May 25, 2010

Semiconductor device with current mirror circuit having two transistors of identical characteristics

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Quick Facts
Patent No.
US 7,723,796
App. No.
11/902,568
Granted
May 25, 2010
Kind
B2
Abstract

A semiconductor device includes a current-mirror circuit including a first ring-shape gate, a second ring-shape gate, a first diffusion layer formed around the first ring-shape gate and the second ring-shape gate, a second diffusion layer formed inside the first ring-shape gate, a third diffusion layer formed inside the second ring-shape gate, an interconnect line electrically connecting the first ring-shape gate and the second ring-shape gate to a same potential, and an STI area formed around the first diffusion layer, wherein a first transistor corresponding to the first ring-shape gate and a second transistor corresponding to the second ring-shape gate constitute the current-mirror circuit, wherein gates of dummy transistors that do not function as transistors are situated between the STI area and the first and second ring-shape gates, and are arranged both in a first direction and in a second direction substantially perpendicular to the first direction.

Claims (39)

1. A semiconductor device, comprising:

a semiconductor substrate;

a first ring-shape gate formed on a surface of the semiconductor substrate;

a second ring-shape gate formed on the surface of the semiconductor substrate;

a first diffusion layer formed in the semiconductor substrate around the first ring-shape gate and the second ring-shape gate;

a second diffusion layer formed in the semiconductor substrate inside the first ring-shape gate;

a third diffusion layer formed in the semiconductor substrate inside the second ring-shape gate;

an interconnect line electrically connecting the first ring-shape gate and the second ring-shape gate to a same potential; and

an STI area formed in the semiconductor substrate around the first diffusion layer,

wherein a first transistor corresponding to the first ring-shape gate and a second transistor corresponding to the second ring-shape gate;

a third transistor having an end of a channel thereof coupled to a drain of the first transistor;

a fourth transistor having an end of a channel thereof coupled to a drain of the second transistor;

a fifth transistor connected both to another end of the channel of the third transistor and to another end of the channel of the fourth transistor; and

gates of dummy transistors that do not function as transistors, the gates being situated between the STI area and the first and second ring-shape gates, and being arranged both in a first direction parallel to the surface of the semiconductor substrate and in a second direction parallel to the surface and substantially perpendicular to the first direction,

wherein the dummy transistors have a drain and a source thereof connected to a same potential.

2. The semiconductor device as claimed in claim 1 , wherein the dummy transistors have one of a drain and a source thereof connected to a power supply potential and another one set in a floating state.

3. The semiconductor device as claimed in claim 2 , wherein the gates of the dummy transistors are connected to the power supply potential.

4. The semiconductor device as claimed in claim 1 , wherein the gates of the dummy transistors are ring-shape gates.

5. The semiconductor device as claimed in claim 4 , wherein the ring-shape gates of the dummy transistors are arranged both in the first direction and in the second direction such as to surround the first ring-shape gate and the second ring-shape gate.

6. The semiconductor device as claimed in claim 1 , wherein the gates of the dummy transistors are straight-line-shape gates.

7. The semiconductor device as claimed in claim 6 , wherein the straight-line-shape gates of the dummy transistors are arranged to extend both in the first direction and in the second direction such as to substantially surround the first ring-shape gate and the second ring-shape gate.

8. The semiconductor device as claimed in claim 1 , wherein the first transistor and the second transistor constitute a current-mirror circuit.

9. A semiconductor device, comprising:

a semiconductor substrate;

a first ring-shape gate formed on a surface of the semiconductor substrate;

a second ring-shape gate formed on the surface of the semiconductor substrate;

a first diffusion layer formed in the semiconductor substrate around the first ring-shape gate and the second ring-shape gate;

a second diffusion layer formed in the semiconductor substrate inside the first ring-shape gate;

a third diffusion layer formed in the semiconductor substrate inside the second ring-shape gate;

an interconnect line electrically connecting the first ring-shape gate and the second ring-shape gate to a same potential; and

an STI area formed in the semiconductor substrate around the first diffusion layer,

wherein a first transistor corresponding to the first ring-shape gate and a second transistor corresponding to the second ring-shape gate;

a third transistor having an end of a channel thereof coupled to a drain of the first transistor;

a fourth transistor having an end of a channel thereof coupled to a drain of the second transistor;

a fifth transistor connected both to another end of the channel of the third transistor and to another end of the channel of the fourth transistor; and

gates of dummy transistors that do not function as transistors, the gates being situated between the STI area and the first and second ring-shape gates, and being arranged both in a first direction parallel to the surface of the semiconductor substrate and in a second direction parallel to the surface and substantially perpendicular to the first direction,

wherein the dummy transistors have one of a drain and a source thereof connected to a power supply potential and another one set in a floating state.

10. The semiconductor device as claimed in claim 9 , wherein the first transistor and the second transistor constitute a current-mirror circuit.

11. The semiconductor device as claimed in claim 9 , wherein the gates of the dummy transistors are connected to the power supply potential.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CHANGE OF NAME Recorded Sep 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 025046/0478 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021977/0219 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2007
From: TOMITA, HIROYOSHI
To: FUJITSU LIMITED
Reel/Frame 019941/0885 →