IP Library Granted Patent US 8,316,158
Granted Patent B1
US 8,316,158 · App. 11/904,644 · Granted Nov 20, 2012

Configuration of programmable device using a DMA controller

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Quick Facts
Patent No.
US 8,316,158
App. No.
11/904,644
Granted
Nov 20, 2012
Kind
B1
Abstract

Methods and a system of configuring a programmable device using a DMA controller are disclosed. In one embodiment, a method includes generating a direct memory access (DMA) request to a direct memory access (DMA) controller in response to a reset of the programmable device. The method further includes automatically loading configuration data of the programmable device to configuration registers of the programmable device using the DMA controller.

Claims (33)

1. A method of configuring a programmable device, the method comprising:

in response to a reset of the programmable device, issuing a default transaction descriptor to a direct memory access (DMA) controller, the default transaction descriptor identifying a plurality of transaction descriptors;

verifying at least one of the plurality of transaction descriptors;

when verified and while the programmable device is in a non-executing state, copying a set of configuration data from a first memory to configuration registers in response to the plurality of transaction descriptors being processed by the DMA controller; and

if the verifying fails, bypassing copying the set of configuration data.

2. The method of claim 1 , wherein the first memory is a non-volatile memory.

3. The method of claim 1 , wherein the issuing the default transaction descriptor comprises placing a processor of the programmable device into the non-executing state.

4. The method of claim 3 , further comprising releasing the processor from the non-executing state in response to a last of the plurality of transaction descriptors being processed by the DMA controller.

5. The method of claim 1 , wherein the issuing the default transaction descriptor comprises copying the plurality of transaction descriptors from a non-volatile memory to a volatile memory using the DMA controller.

6. The method of claim 5 , wherein the copying the set of configuration data comprises executing the plurality of transaction descriptors of the volatile memory using the DMA controller.

7. The method of claim 1 , wherein the verifying of the at least one of the plurality of transaction descriptors comprises comparing field types of the at least one of the plurality of transaction descriptors with expected field types.

8. The method of claim 7 , wherein each of the plurality of transaction descriptors comprises at least one of a source address, a destination address, a priority, and a size of the configuration data.

9. The method of claim 1 , wherein the verifying of the at least one of the plurality of transaction descriptors comprises performing at least one of a checksum and a cyclic redundancy check (CRC) of the at least one of the plurality of transaction descriptors.

10. The method of claim 1 , wherein the default transaction descriptor is stored in a nonvolatile memory.

11. The method of claim 1 , wherein the plurality of transaction descriptors are chained together.

12. A method of configuring a programmable device, the method comprising:

generating a direct memory access (DMA) request to a DMA controller in response to a reset of the programmable device, the generating of the DMA request comprising issuing a default transaction descriptor to the DMA controller in response to a reset of the programmable device, the default transaction descriptor identifying at least one transaction descriptor;

verifying the at least one transaction descriptor prior to automatically loading configuration data of the programmable device to configuration registers of the programmable device; and

while a processor of the programmable device is in a non-executing state, automatically loading the configuration data to the configuration registers of based on using the DMA controller to process the at least one verified transaction descriptor.

13. The method of claim 12 , further comprising maintaining the processor of the programmable device in the non-executing state while the configuration registers are being loaded during the automatically loading configuration data.

14. The method of claim 12 , further comprising releasing the processor from the non-executing state when the automatically loading configuration data of the programmable device is completed.

15. The method of claim 12 , further comprising verifying the configuration data prior to the automatically loading configuration data to the configuration registers.

16. The method of claim 12 , wherein the reset of the programmable device comprises at least one of:

a reset during a runtime operation of the programmable device; and

a master reset during an initialization of the programmable device; a power-on reset; a watchdog reset; an external reset.

17. A system for configuring a programmable device, the system comprising:

a non-volatile memory configured to store transaction descriptors and configuration data;

a comparator configured to verify the transaction descriptors;

a plurality of configuration registers configured to use the verified transaction descriptors to configure the programmable device based on the configuration data; and

a direct memory access (DMA) controller configured to use the verified transaction descriptors to transfer the configuration data from the non-volatile memory to the configuration registers while a processor of the programmable device is in a non-executing state, the DMA controller being configured to transfer the configuration data in response to a reset of the programmable device.

18. The system of claim 17 , wherein the programmable device comprises a programmable system on chip.

19. The system of claim 17 , further comprising a processor and a local memory coupled to the DMA controller to store transaction descriptors used by the DMA controller in transferring the configuration data.

20. The system of claim 19 , further comprising a second memory storing a default transaction descriptor used by the DMA controller in loading the transaction descriptors of the non-volatile memory to the local memory.

Assignments (6)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2008
From: SNYDER, WARREN
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 020439/0987 →