Solid-state imaging device and method for fabricating the same
View Patent ↗A method for fabricating a solid-state imaging device comprises: a step of forming a photodiode protection insulation film 6 a ; a step of forming a dummy protection insulation film 6 c corresponding to the photodiode protection insulation film 6 a both in the peripheral circuit region 1 b and the scribe lane region 1 c ; and a step of forming an interlayer insulation film 9 for covering all three regions of a pixel region 1 a in which pixels and the photodiode protection insulation film 6 a are formed, a peripheral circuit region 1 b in which a driving circuit and the dummy protection insulation film 6 c are formed, and a scribe lane region 1 c in which the dummy protection insulation film 6 c is formed, wherein the dummy protection insulation film 6 c causes an average height of a surface of the interlayer insulation film 9 included in each of the peripheral circuit region 1 b and the scribe lane region 1 c to be close to an average height of a surface of the interlayer insulation film 9 included in the pixel region 1 a , before a CMP is performed on an entirety of the surface thereof.
1. A method for fabricating a solid-state imaging device comprising, on a main surface of a semiconductor substrate, a pixel region, a peripheral circuit region located around a periphery of the pixel region, and a scribe lane region located around the periphery of the peripheral circuit region, the method comprising:
a step of forming pixels in the pixel region;
a step of forming a driving circuit for driving the pixels in the peripheral circuit region;
a step of forming a photodiode protection insulation film for protecting a photodiode acting as a component of each of the pixels on the main surface of the semiconductor substrate;
a step of forming a dummy protection insulation film corresponding to the photodiode insulation film both in the peripheral circuit region and the scribe lane region;
a step of forming a dummy gate electrode, not functioning as a gate of a transistor, only in the scribe lane region,
a step of forming an interlayer insulation film for covering three regions of the pixel region, the peripheral circuit region, and the scribe lane region; and
a step of performing a CMP (Chemical Mechanical Polishing) on an entirety of a surface of the interlayer insulation film.
2. The method for fabricating the solid-state imaging device according to claim 1 , wherein
the step of forming the photodiode protection insulation film and the step of forming the dummy protection insulation film are performed in the same step.
3. The method for fabricating the solid-state imaging device according to claim 1 , wherein
the step of forming the dummy gate electrode is performed in the step of forming the driving circuit for driving the pixels in the peripheral circuit region.
4. The method for fabricating the solid-state imaging device according to claim 3 , wherein
the dummy protection insulation film and the dummy gate electrode cause the average heights of the surfaces of the interlayer insulation film included in at least any two of the three regions of the pixel region, the peripheral circuit region and the scribe lane region to be nearly equivalent to each other, before the CMP is performed on the entirety of the surface thereof.
5. A solid-state imaging device comprising, on a main surface of a semiconductor substrate, a pixel region, a peripheral circuit region located around a periphery of the pixel region, and a scribe lane region located around a periphery of the peripheral circuit region, the solid-state imaging device comprising:
pixels formed in the pixel region;
a driving circuit for driving the pixels in the peripheral circuit region;
a photodiode protection insulation film, for protecting a photodiode acting as a component of each of the pixels, which is formed on the main surface of the semiconductor substrate;
a dummy protection insulation film, corresponding to the photodiode protection insulation film, which is formed both in the peripheral circuit region and the scribe lane region;
a dummy gate electrode, not functioning as a gate of a transistor, which is formed only in the scribe lane region; and
an interlayer insulation film for covering three regions of the pixel region, the peripheral circuit region, and the scribe lane region.
6. The solid-state imaging device according to claim 5 , wherein
a material of the photodiode protection insulation film is the same as that of the dummy protection insulation film.
7. The solid-state imaging device according to claim 5 , wherein
a material of the dummy gate electrode is the same as that of a gate electrode in the peripheral circuit region.
8. The solid-state imaging device according to claim 7 , wherein
the dummy protection insulation film and the dummy gate electrode cause the average heights of the surfaces of the interlayer insulation film included in at least any two of the three regions of the pixel region, the peripheral circuit region and the scribe lane region to be nearly equivalent to each other, before the CMP is performed on the entirety of the surface thereof.