IP Library Granted Patent US 8,010,869
Granted Patent B2
US 8,010,869 · App. 11/911,148 · Granted Aug 30, 2011

Method and device for controlling the decoding of a LDPC encoded codeword, in particular for DVB-S2 LDPC encoded codewords

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Quick Facts
Patent No.
US 8,010,869
App. No.
11/911,148
Granted
Aug 30, 2011
Kind
B2
Abstract

This is a method for controlling the decoding of a LDPC encoded codeword composed of several digital data, said LDPC code being represented by a bipartite graph between check nodes (CN 1 ) and variable nodes (VN i ). Said method comprises updating messages exchanged iteratively between variable nodes (VN 1 ) and check nodes (CN 1 ). Said method comprises, at each iteration, calculating for each variable node a first sum (Λ n ) of all the incident messages (λ i ) received by said variable node and the corresponding digital data (λ ch ) and calculating a second sum (VNR new ) of all the absolute values of the first sums (Λ n ), and stopping the decoding process if the second sum (VNR new ) is unchanged or decreases within two successive iterations and if a predetermined threshold condition is satisfied.

Claims (146)

1. A method for controlling decoding of a low density parity-check (LDPC) encoded codeword comprising digital data, an LDPC code being represented by a graph between check nodes and variable nodes, the method comprising:

updating messages exchanged iteratively between the variable nodes and the check nodes; and

at each iteration performing at least

calculating for each variable node a first sum of incident messages received by the variable node and the corresponding digital data,

calculating a second sum of absolute values of the first sums, and

stopping the decoding process if the second sum is unchanged or decreases within two successive iterations, and if a threshold condition is satisfied.

2. The method according to claim 1 , wherein the threshold condition is satisfied if a current second sum is less than a threshold.

3. The method according to claim 2 , wherein the threshold is dependent on a code rate of the LDPC code.

4. The method according to claim 2 , wherein the encoded codeword is received from a channel, and the threshold is independent of a signal-to-noise ratio of the channel.

5. The method according to claim 2 , wherein the threshold is dependent on a number of bits of the exchanged messages.

6. The method according to claim 2 , wherein the encoded codeword is received from a channel, and the threshold is defined by:

VNR

off

=

4

R

×

(

E

b

N

0

)

WR

×

N

wherein:

N is a number of bits of the exchanged messages,

E b is a mean energy for transmitting a bit information on the channel,

N 0 is a noise energy of the channel,

R is a code rate of the LDPC code, and

(

E

b

N

0

)

WR

 is a value of a ratio

E

b

N

0

 of a waterfall region of a curve representing a frame error rate (FER) as a function of the ratio.

7. The method according to claim 2 , wherein the threshold (VNR off ) is defined by: VNR off =2 (q−1) ×N

wherein:

N is a number of bits of the exchanged messages, and

q is a number of bits used for representing an absolute value of the message.

8. The method according to claim 1 , wherein the threshold condition is satisfied as long as the number of iterations is less than or equal to a predetermined number of iterations.

9. The method according to claim 1 , wherein the digital data of the encoded codeword and the messages comprise log-likelihood ratios (LLR).

10. The method according to claim 1 , wherein the LDPC code comprises a DVB-S2 LDPC code.

11. A decoder for decoding a low density parity-check (LDPC) encoded codeword comprising digital data, the decoder comprising:

a processor for updating messages exchanged iteratively between variable nodes and check nodes of a graph for an LDPC code, said processor comprising

a calculation module for calculating, at each iteration for each variable node a first sum of incident messages received by the variable node and the corresponding digital data, and for calculating a second sum of absolute values of the first sums, and

a control module for stopping the decoding process if the second sum is unchanged or decreases within two successive iterations, and if a threshold condition is satisfied.

12. The decoder according to claim 11 , wherein the threshold condition is satisfied if a current second sum is less than a threshold.

13. The decoder according to claim 12 , wherein the threshold is dependent on a code rate of the LDPC code.

14. The decoder according to claim 12 , wherein the encoded codeword is received from a channel, and the threshold is independent of a signal-to-noise ratio of the channel.

15. The decoder according to claim 12 , wherein the threshold is dependent on a number of bits of the exchanged messages.

16. The decoder according to claim 12 , wherein the encoded codeword is received from a channel, and the threshold (VNR off ) is defined by:

VNR

off

=

4

R

×

(

E

b

N

0

)

WR

×

N

wherein:

N is a number of bits of the exchanged messages,

E b is a mean energy for transmitting a bit information on the channel,

N 0 is a noise energy of the channel,

R is a code rate of the LDPC code, and

(

E

b

N

0

)

WR

 is a value of a ratio

E

b

N

0

 of a waterfall region of a curve representing a frame error rate (FER) as a function of the ratio.

17. The decoder according to claim 12 , wherein the threshold is defined by: VNR off =2 (q−1) ×N

wherein:

N is a number of bits of the exchanged messages, and

q is a number of bits used for representing an absolute value of the message.

18. The decoder according to claim 12 , further comprising a memory comprising a look-up table for storing values of the threshold according to a code rate of the LDPC code and a number of bits of the exchanged messages.

19. The decoder according to claim 11 , wherein the digital data of the encoded codeword and the messages comprise log-likelihood ratios (LLR).

20. A receiver comprising:

a demodulator; and

a decoder coupled to said demodulator for decoding a low density parity-check (LDPC) encoded codeword comprising digital data said decoder comprising:

a processor for updating messages exchanged iteratively between variable nodes and check nodes of a graph for an LDPC code, said processor configured for performing the following

calculating, at each iteration for each variable node a first sum of incident messages received by the variable node and the corresponding digital data, and for calculating a second sum of absolute values of the first sums, and

stopping the decoding process if the second sum is unchanged or decreases within two successive iterations, and if a threshold condition is satisfied, with the threshold condition being satisfied if a current second sum is less than a threshold.

21. The receiver according to claim 20 , wherein the encoded codeword is received from a channel, and the threshold (VNR off ) is defined by:

VNR

off

=

4

R

×

(

E

b

N

0

)

WR

×

N

wherein:

N is a number of bits of the exchanged messages,

E b is a mean energy for transmitting a bit information on the channel,

N 0 is a noise energy of the channel,

R is a code rate of the LDPC code, and

(

E

b

N

0

)

WR

 is a value of a ratio

E

b

N

0

 of a waterfall region of a curve representing a frame error rate (FER) as a function of the ratio.

22. The receiver according to claim 20 , wherein the threshold is defined by: VNR off =2 (q−1 )×N

wherein:

N is a number of bits of the exchanged messages, and

q is a number of bits used for representing an absolute value of the message.

23. The receiver according to claim 20 , further comprising a memory comprising a look-up table for storing values of the threshold according to a code rate of the LDPC code and a number of bits of the exchanged messages.

24. The receiver according to claim 20 , wherein the digital data of the encoded codeword and the messages comprise log-likelihood ratios (LLR).

25. The receiver according to claim 20 , wherein the LDPC code comprises a DVB-S2 LDPC code.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2022
From: STMICROELECTRONICS N.V.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 062201/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 10, 2007
From: WEHN, NORBERT; KIENLE, FRANK; BRACK, TORBEN
To: STMICROELECTRONICS N.V.
Reel/Frame 019940/0581 →