Integrated circuit having configurable cells and a secured test mode
An electronic circuit includes a plurality of configurable cells configured by a control circuit such as a test access controller when it receives a mode command signal: either in a functional state in which the configurable cells are functionally linked to logic cells with which they co-operate to form at least one logic circuit if the mode command signal is in a first state or in a chained state in which the configurable cells are functionally connected in a chain to form a shift register, if the mode command signal is in a second state. The electronic circuit also includes a detection circuit laid out to produce an active state signal if it detects a chained state of the configurable cells while the controller receives the mode command signal in the first state.
1. An electronic circuit comprising:
a plurality of configurable cells configured by a control circuit such as a test access controller when it receives a mode command signal:
either in a functional state in which the configurable cells are functionally linked to logic cells with which they co-operate to form at least one logic circuit if the mode command signal is in a first state,
or in a chained state in which the configurable cells are functionally connected in a chain to form a shift register, if the mode command signal is in a second state,
a detection circuit laid out to produce an active state signal if it detects a chained state of the configurable cells while the controller receives the mode command signal in the first state, the detection circuit comprising:
a state cell comprising a first data input to which there is applied a signal having a reference value, a second data input connected to the output of a preceding configurable cell, a third selection input connected to the controller and an output connected to a following configurable cell, the state cell being:
functionally connected in a chain between the preceding configurable cell and the following configurable cell if the configurable cells are in the chained state, said state cell producing an output signal representing the content of the chain, or
functionally cut off if the configurable cells are in the functional state, said state signal then producing an output signal that represents the reference value,
a comparison circuit comprising a first data input connected to the output of the state cell and a second data input on which the mode command signal is applied, to compare the output signal with the reference value when it receives the mode command signal and produce the active state signal if the value of the output signal is different from the reference value.
2. A circuit according to claim 1 , wherein the detection circuit comprises several state cells which are:
functionally connected in a chain with the configurable cells if the configurable cells are in the chained state, each state cell being connected between the preceding configurable cell and the following configurable cell, each state cell producing an output signal representing the content of the chain or
functionally cut off if the configurable cells are in the functional state, each state cell then producing an output signal representing one reference value among a set of reference values,
the comparison circuit comparing the output signal of each state cell with a reference value when it receives the mode command signal in the first state, and producing the active state signal if the value of one of the output signals is different from the associated reference value.
3. A circuit according to claim 2 wherein each configurable cell of said plurality of configurable cells also comprises:
a flip-flop circuit having one output connected to the output of each configurable cell, and
a multiplexer having a first data input and a second data input respectively connected to the first input and to the second input of each configurable cell, a selection input connected to the third input of each configurable cell, and an output connected to the data input of the flip-flop circuit.
4. A circuit according claim 2 , wherein the comparison circuit comprises:
a combinatorial logic circuit to combine the output signals from several state cells with one another, and
a means to compare the result of the combination with the reference value when it receives the mode command signal, and produce the active state signal if the result of the combination is different from the reference value.
5. A circuit according to claim 2 , wherein at least one configurable cell of said plurality of configurable cells is made similarly to a state cell, the first data input of said at least one configurable cell being connected to one output of a logic cell with which it co-operates.
6. A circuit according to claim 1 wherein each configurable cell in said plurality of configurable cells also comprises:
a flip-flop circuit having one output connected to the output of each configurable cell, and
a multiplexer having a first data input and a second data input respectively connected to the first input and to the second input of each configurable cell, a selection input connected to the third input of each configurable cell, and an output connected to the data input of the flip-flop circuit.
7. A circuit according claim 6 , wherein the comparison circuit comprises:
a combinatorial logic circuit to combine the output signals from several state cells with one another, and
a means to compare the result of the combination with the reference value when it receives the mode command signal, and produce the active state signal if the result of the combination is different from the reference value.
8. A circuit according to claim 6 , wherein at least one configurable cell of said plurality of configurable cells is made similarly to a state cell, the first data input of said at least one configurable cell being connected to one output of a logic cell with which it co-operates.
9. A circuit according claim 1 , wherein the comparison circuit comprises:
a combinatorial logic circuit to combine the output signals from several state cells with one another, and
a means to compare the result of the combination with the reference value when it receives the mode command signal and produce the active state signal if the result of the combination is different from the reference value.
10. A circuit according to claim 9 , wherein at least one configurable cell of said plurality of configurable cells is made similarly to a state cell, the first data input of said at least one configurable cell being connected to one output of a logic cell with which it co-operates.
11. A circuit according to claim 1 , wherein at least one configurable cell of said plurality of configurable cells is made similarly to a state cell, the first data input of said at least one configurable cell being connected to one output of a logic cell with which it co-operates.