IP Library Granted Patent US 8,081,212
Granted Patent B2
US 8,081,212 · App. 11/914,817 · Granted Dec 20, 2011

Abnormality detecting apparatus

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,081,212
App. No.
11/914,817
Granted
Dec 20, 2011
Kind
B2
Abstract

An abnormality detecting apparatus comprises a synchronous detecting circuit for detecting a synchronous signal from a video signal outputted from a camera unit, and an abnormality detecting circuit for judging whether or not a first direct current signal level obtained from an input path of said video signal is greater than a predetermined first threshold value, whether or not a second direct current signal level obtained from said input path of said video signal is smaller than a predetermined second threshold value, and whether or not said synchronous signal is detected by said synchronous detecting circuit, and determining that said input path of said video signal is in one of a normal state, an open state, a power connected state, and a ground connected state based on the result of the judgments.

Claims (26)

1. An abnormality detecting apparatus, comprising:

a synchronous detecting circuit for detecting a synchronous signal from a video signal outputted from a video outputting unit; and

path state judging means for judging whether or not a first direct current signal level obtained from an input path of said video signal is greater than a predetermined first threshold value, whether or not a second direct current signal level obtained from said input path of said video signal is smaller than a predetermined second threshold value, and whether or not said synchronous signal is detected by said synchronous detecting circuit, and determining that said input path of said video signal is in one of a normal state, an open state, a power connected state, and a ground connected state based on the result of the judgments, in which

said path state judging means is operative to determine that said input path is in said open state when said first direct current signal level is smaller than said first threshold value, said second direct current signal level is greater than said second threshold value, and said synchronous signal is not detected by said synchronous detecting circuit.

2. An abnormality detecting apparatus as set forth in claim 1 , in which said path state judging means is operative to determine that said input path is in said normal state when said synchronous signal is detected by said synchronous detecting circuit.

3. An abnormality detecting apparatus as set forth in claim 1 , in which said path state judging means is operative to determine that said input path is in said power connected state when said first direct current signal level is greater than said first threshold value.

4. An abnormality detecting apparatus as set forth in claim 1 , in which said path state judging means is operative to determine that said input path is in said ground connected state when said second direct current signal level is smaller than said second threshold value.

5. An abnormality detecting apparatus as set forth in claim 1 , in which said path state judging means is operative to obtain said first direct current signal level and said second direct current signal level respectively by dividing voltage applied to said input path of said video signal.

6. An abnormality detecting apparatus, comprising:

a synchronous detecting circuit for detecting a synchronous signal from a video signal outputted from a video outputting unit; and

path state judging means for judging whether or not a first direct current signal level obtained from an input path of said video signal is greater than a predetermined first threshold value, whether or not a second direct current signal level obtained from said input path of said video signal is smaller than a predetermined second threshold value, and whether or not said synchronous signal is detected by said synchronous detecting circuit, and determining that said input path of said video signal is in one of a normal state, an open state, a power connected state, and a ground connected state based on the result of the judgments, in which

a state whether or not said first direct current signal level is greater than said first threshold value, a state whether or not said second direct current signal level is smaller than said second threshold value, and a state whether or not said synchronous signal is detected by said synchronous detecting circuit are respectively indicated by state signals, and

said path state judging means is operative to represent each of said states by two signals including a logical sum of one of said state signals and the other one of said state signal and a logical sum of said one of said state signals and the remaining one of said state signals.

7. A video system, comprising:

a video outputting unit for outputting a video signal;

a display unit for displaying said video signal; and

a video signal processing unit for having said display unit display said video signal outputted from said video outputting unit, and in which

said video signal processing unit includes a synchronous detecting circuit for detecting a synchronous signal from said video signal outputted from said video outputting unit, and path state judging means for judging whether or not a first direct current signal level obtained from an input path of said video signal is greater than a predetermined first threshold value, whether or not a second direct current signal level obtained from said input path of said video signal is smaller than a predetermined second threshold value, and whether or not said synchronous signal is detected by said synchronous detecting circuit, and determining that said input path of said video signal is in one of a normal state, an open state, a power connected state, and a ground connected state based on the result of the judgments, and in which

said path state judging means is operative to determine that said input path is in said open state when said first direct current signal level is smaller than said first threshold value, said second direct current signal level is greater than said second threshold value, and said synchronous signal is not detected by said synchronous detecting circuit.

8. A video system, comprising:

a video outputting unit for outputting a video signal;

a display unit for displaying said video signal; and

a video signal processing unit for having said display unit display said video signal outputted from said video outputting unit, and in which

said video signal processing unit includes a synchronous detecting circuit for detecting a synchronous signal from said video signal outputted from said video outputting unit, and path state judging means for judging whether or not a first direct current signal level obtained from an input path of said video signal is greater than a predetermined first threshold value, whether or not a second direct current signal level obtained from said input path of said video signal is smaller than a predetermined second threshold value, and whether or not said synchronous signal is detected by said synchronous detecting circuit, and determining that said input path of said video signal is in one of a normal state, an open state, a power connected state, and a ground connected state based on the result of the judgments, and in which

a state whether or not said first direct current signal level is greater than said first threshold value, a state whether or not said second direct current signal level is smaller than said second threshold value, and a state whether or not said synchronous signal is detected by said synchronous detecting circuit are respectively indicated by state signals, and

said path state judging means is operative to represent each of said states by two signals including a logical sum of one of said state signals and the other one of said state signal and a logical sum of said one of said state signals and the remaining one of said state signals.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2024
From: PANASONIC HOLDINGS CORPORATION
To: PANASONIC AUTOMOTIVE SYSTEMS CO., LTD.
Reel/Frame 066703/0278 →
CHANGE OF NAME Recorded Feb 21, 2024
From: PANASONIC CORPORATION
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 066644/0558 →
CHANGE OF NAME Recorded Nov 13, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021832/0197 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2008
From: YOSHIOKA, KENJI; SATO, MASAKI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020562/0063 →