Frequency synthesizer and charge pump circuit used therein
View Patent ↗There are included a signal generating circuit ( 8 ) that generates, based on a comparison signal outputted from a phase comparator ( 3 ) and a clock signal outputted from a crystal oscillation circuit ( 1 ) and having a shorter pulse width than the comparison signal, a control signal obtained from a logical product of the two signals; and a charge pump circuit that performs, based on the control signal from the signal generating circuit ( 8 ), a charging or discharging operation of a capacitor. The charging or discharging operation of the capacitor is gradually performed little by little based on the control signal having the shorter pulse width than the conversional comparison signal, whereby even if the capacitance value of the capacitor is reduced, the substantial time constant can be enlarged, resulting in a stable operation of a frequency synthesizer.
1. A frequency synthesizer comprising:
a phase comparator configured to detect a phase difference between a reference signal outputted from a reference frequency divider and a variable frequency signal outputted from a variable frequency divider and to output a comparison signal having a pulse width dependent on the detected phase difference;
a signal generating circuit configured to generate a control signal obtained by taking a logical product of the comparison signal outputted from the phase comparator and a clock signal having a pulse width shorter than the comparison signal; and
a charge pump circuit configured to perform, based on the control signal outputted from the signal generating circuit and using a constant current source, a charging operation or a discharging operation on a capacitor in a loop filter.
2. The frequency synthesizer according to claim 1 , wherein
the reference frequency divider generates the reference signal by dividing the frequency of the signal outputted from a crystal oscillation circuit using a fixed ratio, and the signal outputted from the crystal oscillation circuit or a signal outputted from the reference frequency divider midway through the division is used as the clock signal.
3. The frequency synthesizer according to claim 1 , wherein
the charge pump circuit includes a switching circuit configured to switch between connection and disconnection of the constant current source based on the control signal outputted from the signal generating circuit.
4. A charge pump circuit comprising:
a signal generating circuit configured to generate a control signal obtained by taking a logical product of a comparison signal outputted from a phase comparator and a clock signal having a pulse width shorter than the comparison signal; and
a loop filter configured to perform, based on the control signal outputted from the signal generating circuit and using a constant current source, a charging operation or a discharging operation on a capacitor.
5. The charge pump circuit according to claim 4 , further comprising:
a switching circuit configured to switch between connection and disconnection of the constant current source based on the control signal outputted from the signal generating circuit.