IP Library Granted Patent US 7,966,505
Granted Patent B2
US 7,966,505 · App. 11/921,486 · Granted Jun 21, 2011

Method and apparatus for power reduction in iterative decoders

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Quick Facts
Patent No.
US 7,966,505
App. No.
11/921,486
Granted
Jun 21, 2011
Kind
B2
Abstract

There are provided a method, an apparatus and a computer program product for reducing power consumption in an iterative decoder. The apparatus includes a memory device and an iteration termination device. The memory device is for storing a bit number difference indicating a number of bits that are different between a decoded codeword for a current iteration and a decoded codeword for a previous iteration, for each iteration of the iterative decoder prior to a maximum number of iterations. The iteration termination device is for comparing the bit number difference to a pre-specified bit number difference threshold value, incrementing a confidence value when the bit number difference exceeds the pre-specified bit number difference threshold value, and terminating further iterations of the iterative decoder when the confidence value exceeds a pre-specified confidence threshold value.

Claims (17)

1. An apparatus for reducing power consumption in an iterative decoder, comprising:

a memory device for storing a bit number difference indicating a number of bits that are different between a decoded codeword for a current iteration and a decoded codeword for a previous iteration, for each iteration of the iterative decoder prior to a maximum number of iterations; and

an iteration termination device for comparing the bit number difference to a pre-specified bit number difference threshold value, incrementing a confidence value when the bit number difference is less than the pre-specified bit number difference threshold value, and terminating further iterations of the iterative decoder when the confidence value exceeds a pre-specified confidence threshold value;

wherein said iteration termination device resets the confidence value to zero when the bit number difference is equal to or higher than the pre-specified bit number difference threshold value.

2. The apparatus according to claim 1 , wherein the pre-specified bit number difference threshold value corresponds to an error correction capability of an outer decoder in a system utilizing a concatenation of an iterative decoder and an outer decoder.

3. The apparatus according to claim 1 , wherein K min is equal to a minimum number of iterations required to decode the codeword under normal channel conditions, and said memory device stores the decoded codeword for the current iteration when a current number of iterations is equal to K min .

4. The apparatus according to claim 1 , wherein said memory device is further for storing the confidence value.

5. The apparatus according to claim 1 , wherein the iterative decoder includes an iteration controller, and said iteration termination device terminates the further iterations of the iterative decoder by generating a stop iterating control signal and transmitting the stop iterating control signal to the iteration controller.

6. A method for reducing power consumption in an iterative decoder, comprising the steps of:

for each iteration of the iterative decoder prior to a maximum number of iterations, storing, in a buffer, a bit number difference indicating a number of bits that are different between a decoded codeword for a current iteration and a decoded codeword for a previous iteration;

comparing the bit number difference to a pre-specified bit number difference threshold value;

incrementing a confidence value when the bit number difference is less than the pre-specified bit number difference threshold value;

terminating further iterations of the iterative decoder when the confidence value exceeds a pre-specified confidence threshold value; and

resetting the confidence value to zero, when the bit number difference is equal to or higher than the pre-specified bit number difference threshold value.

7. The method according to claim 6 , wherein the pre-specified bit number difference threshold value corresponds to an error correction capability of an outer decoder in a system utilizing a concatenation of an iterative decoder and an outer decoder.

8. The method according to claim 6 , wherein K min is equal to a minimum number of iterations required to decode the codeword under normal channel conditions, and said storing step is initiated when a current number of iterations is equal to K min .

9. The method according to claim 6 , further comprising the step of storing the confidence value in the buffer.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME FROM INTERDIGITAL CE PATENT HOLDINGS TO INTERDIGITAL CE PATENT HOLDINGS, SAS. PREVIOUSLY RECORDED AT REEL: 47332 FRAME: 511. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 28, 2024
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS, SAS
Reel/Frame 066703/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2018
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS
Reel/Frame 047332/0511 →