Monolithic read-while-write flash memory device
View Patent ↗A memory device includes an executable flash memory partition and a non-executable partition, both partitions being fabricated on a common die. Preferably, both partitions are fabricated using the same flash memory technology. Most preferably, the flash cells of both partitions have insulating floating gates.
1. A memory device comprising:
an executable flash memory partition;
a non-executable flash memory partition;
circuitry configured to perform at least one of a write operation and an erase operation in the non-executable flash memory partition concurrently with a processor executing code in the executable flash memory partition; and
wherein the executable flash memory partition, the non-executable flash memory partition, and the circuitry are fabricated on a common die.
2. The memory device of claim 1 , wherein the non-executable flash memory partition is a serial-access flash memory partition.
3. The memory device of claim 1 , wherein the non-executable flash memory partition is fabricated as including serial-access flash cells, and the executable flash memory partition is fabricated as including random-access flash cells.
4. The memory device of claim 1 , wherein the circuitry comprises first circuitry for managing the executable flash memory partition and second circuitry for managing the non-executable flash memory partition.
5. The memory device of claim 4 , wherein the second circuitry occupies a smaller area per cell on the common die than the first circuitry occupies per cell on the common die.
6. The memory device of claim 1 , wherein both of the flash memory partitions are fabricated using a common flash memory technology.
7. The memory device of claim 1 , wherein each flash memory cell of the executable flash memory partition has a first memory structure, and wherein each flash memory cell of the non-executable flash memory partition has a second memory structure that differs from the first memory structure.
8. An electronic device comprising the memory device of claim 1 .
9. The electronic device of claim 8 , wherein the electronic device is one of a cellular telephone or a personal data assistant.
10. A method of operating an electronic device, the method comprising:
in a memory device that includes
an executable flash memory partition,
a non-executable flash memory partition, and circuitry configured to perform at least one of a write operation and an erase operation in the non-executable flash memory partition concurrently with a processor executing code in the executable flash memory partition, wherein the executable flash memory partition, the non-executable flash memory partition, and the circuitry are fabricated on a common die, performing:
storing, in the executable flash memory partition, the executable code for operating the electronic device; and
executing the executable code in-place to operate the electronic device, wherein the executable code that is executed in-place in the memory device to operate the electronic device is stored only in the executable flash memory partition in the memory device.
11. The method of claim 10 , wherein the circuitry comprises first circuitry for managing the executable flash memory partition and second circuitry for managing the non-executable flash memory partition, and wherein the second circuitry occupies a smaller area per cell on the common die than the first circuitry.
12. An electronic device comprising a memory device coupled to a processor, the memory device comprising:
an executable flash memory partition having stored therein code usable for operating the electronic device;
a non-executable flash memory partition; and
circuitry configured to perform at least one of a write operation and an erase operation in the non-executable flash memory partition concurrently with the processor executing the code in the executable flash memory partition, wherein the executable flash memory partition, the non-executable flash memory partition, and the circuitry are fabricated on a common die, and wherein the code being executed is stored only in the executable flash memory partition.
13. The electronic device of claim 12 , wherein the non-executable flash memory partition is a serial-access flash memory partition.
14. The electronic device of claim 12 , wherein the non-executable flash memory partition is fabricated as including serial-access flash cells, and wherein the executable flash memory partition is fabricated as including random-access flash cells.
15. The electronic device of claim 12 , wherein the circuitry comprises first circuitry for managing the executable flash memory partition and second circuitry for managing the non-executable flash memory partition.
16. The electronic device of claim 15 , wherein the second circuitry occupies a smaller area per cell on the common die than the first circuitry.
17. The electronic device of claim 12 , wherein the executable flash memory partition and the non-executable flash memory partition are fabricated using a common flash memory technology.
18. The electronic device of claim 12 , wherein each flash memory cell of the executable flash memory partition has a first memory structure, and wherein each flash memory cell of the non-executable flash memory partition has a second memory structure that differs from the first memory structure.
19. The electronic device of claim 18 , wherein the executable flash memory partition includes a NOR flash memory structure, and wherein the non-executable flash memory partition includes a NAND flash memory structure.
20. The electronic device of claim 19 , wherein the electronic device is one of a cellular telephone and a personal data assistant.