IP Library Patent Application 11925673
Patent Application
App. No. 11/925,673

COATINGS FOR COMPONENTS OF SEMICONDUCTOR WAFER FABRICATION EQUIPMENT

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Patent No.
US None
App. No.
11/925,673
Abstract

A method of forming a high wear resistance coating on a substrate having a low coefficient of thermal expansion is described. The method may include providing the low CTE substrate, where a surface of the substrate includes a plurality of protrusions raised above the surface. A high wear resistance layer is formed on a top portion of protrusions, where the layer is not contiguous between adjacent protrusions on the substrate. Also, a wafer support component to support a wafer during, for example, a photolithography or inspection process. The wafer support component includes a substrate that has a material with a low coefficient of thermal expansion, where the substrate has a surface with a plurality of protrusions raised about the surface. A high wear resistance layer is formed on a top surface of each of the protrusions.

Claims (52)

1 . A method of forming a high wear resistance coating on a substrate having a low coefficient of thermal expansion, the method comprising:

providing the low CTE substrate, wherein a surface of the substrate comprises a plurality of protrusions raised above the surface;

forming a high wear resistance layer on a top portion of protrusions, wherein the layer is not contiguous between adjacent protrusions on the substrate.

2 . The method of claim 1 , wherein the high wear resistance layer is formed on the substrate at a temperature that is less than a phase transition temperature of the substrate.

3 . The method of claim 1 , wherein the method includes polishing the protrusions before forming the high wear resistance layer on the top portions of the protrusions.

4 . The method of claim 1 , wherein a top surface of the protrusions are polished to a surface an average surface roughness of about 1 to about 2 nm root mean squared.

5 . The method of claim 1 , wherein the method includes performing an acid etch on the protrusions before forming the high wear resistance layer on the top portions of the protrusions.

6 . The method of claim 1 , wherein the protrusions have a substantially square, rectangular, conical, or trapezoidal cross-sectional profile.

7 . The method of claim 1 , wherein the top portion of the protrusions comprise a top surface that is substantially parallel to the surface of the substrate.

8 . The method of claim 6 , wherein the high wear resistance layer is formed on the top surface of the protrusions, and also extends down a portion of at least one side of the protrusion that is adjacent to the top surface.

9 . The method of claim 1 , wherein the high wear resistance layer is formed with an ion beam deposition process.

10 . The method of claim 9 , wherein the ion beam deposition process is performed at a temperature of about 250° C. or less.

11 . The method of claim 9 , wherein the high wear resistance layer has a thickness of about 20 μm or less.

12 . The method of claim 1 , wherein the high wear resistance layer is formed with a plasma enhanced chemical vapor deposition process.

13 . The method of claim 12 , wherein the high wear resistance layer has a thickness of about 150 μm or less.

14 . The method of claim 1 , wherein the high wear resistance layer is formed with a laser deposition process.

15 . The method of claim 1 , wherein the high wear resistance layer is formed with a high-density plasma chemical vapor deposition process which comprises both etching the substrate and depositing the high wear resistance layer.

16 . The method of claim 1 , wherein the low CTE substrate comprises a material having a coefficient of thermal expansion of 1.0×10 −6 K −1 or less at 23° C.

17 . The method of claim 1 , wherein the low CTE substrate comprises a material having a coefficient of thermal expansion of 0.1×10 −6 K −1 or less at 23° C.

18 . The method of claim 1 , wherein the low CTE substrate comprises a material having a coefficient of thermal expansion of 0.01×10 −6 K −1 or less at 23° C.

19 . The method of claim 1 , wherein the low CTE substrate comprises a glass ceramic.

20 . The method of claim 1 , wherein the low CTE substrate comprises cordierite.

21 . The method of claim 1 , wherein the low CTE substrate comprises a metal silicate glass.

22 . The method of claim 1 , wherein the low CTE substrate comprises a titanium silicate glass.

23 . The method of claim 1 , wherein the low CTE substrate comprises Zerodur® or ULE™ Zero Expansion Glass.

24 . The method of claim 1 , wherein the high wear resistance layer is made from a material comprising silicon carbide, silicon nitride, aluminum oxide, diamond-like carbon, titanium nitride, zirconium nitride, or tungsten carbide.

25 . A method of forming a discontinuous silicon carbide layer on a Zerodur substrate used as a wafer support, the method comprising:

providing the Zerodur substrate, wherein a surface of the substrate comprises a plurality of protrusions raised above the surface;

polishing top portions of the protrusions;

contacting the Zerodur substrate with an acid etchant;

aligning a deposition mask between an ion beam source and the Zerodur substrate, wherein the mask is aligned to allow the silicon carbide layer to form on the protrusions;

forming the silicon carbide layer on the top portions and a portion of at least one side of the protrusions with an ion beam deposition performed at a temperature of about 100° C. or less, wherein the silicon carbide layer is not contiguous between adjacent protrusions on the substrate.

26 . A wafer support component to support a wafer in a wafer processing chamber, the wafer support component comprising:

a substrate comprising a material with a low coefficient of thermal expansion, wherein the substrate has a surface with a plurality of protrusions raised about the surface; and

a high wear resistance layer formed on a top surface of each of the protrusions.

27 . The wafer support component of claim 26 , wherein at least a portion of the protrusions make contact with the wafer during a wafer processing operation in the processing chamber.

28 . The wafer support component of claim 26 , wherein the protrusions have a substantially square, rectangular, conical, or trapezoidal cross-sectional profile.

29 . The wafer support component of claim 26 , wherein the top portion of the protrusions comprise a top surface that is substantially parallel to the surface of the substrate.

30 . The wafer support component of claim 26 , wherein the high wear resistance layer is formed on the top surface of the protrusions, and also extends down a portion of at least one side of the protrusion that is adjacent to the top surface.

31 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion has a coefficient of thermal expansion of 1.0×10 −6 K −1 or less at 23° C.

32 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion has a coefficient of thermal expansion of 0.1×10 −6 K −1 or less at 23° C.

33 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion has a coefficient of thermal expansion of 0.05×10 −6 K −1 or less at 23° C.

34 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion has a coefficient of thermal expansion of 0.01×10 −6 K −1 or less at 23° C.

35 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion comprises a glass ceramic.

36 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion comprises cordierite.

37 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion comprises a metal silicate glass.

38 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion comprises a titanium silicate glass.

39 . The wafer support component of claim 26 , wherein the material with the low coefficient of thermal expansion comprises Zerodur® or ULE™ Zero Expansion Glass.

40 . The wafer support component of claim 26 , wherein the high wear resistance layer is not contiguous between adjacent protrusions on the substrate.

41 . The wafer support component of claim 26 , wherein the high wear resistance layer comprises silicon carbide, silicon nitride, aluminum oxide, diamond-like carbon, titanium nitride, zirconium nitride, or tungsten carbide.

42 . The wafer support component of claim 26 , wherein the high wear resistance layer has a thickness of about 20 μm or less.

43 . The wafer support component of claim 26 , wherein the high wear resistance layer has a thickness of about 150 μm or less.

Assignments (3)
NOTICE OF RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 050237, FRAME 0557 Recorded Oct 13, 2025
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: COORSTEK, INC.
Reel/Frame 073063/0104 →
SECURITY INTEREST Recorded Aug 29, 2019
From: COORSTEK, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 050237/0557 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2007
From: WILLIAMS, STEVEN C.
To: COORSTEK, INC.
Reel/Frame 020194/0761 →