IP Library Granted Patent US 7,639,100
Granted Patent B2
US 7,639,100 · App. 11/929,987 · Granted Dec 29, 2009

RF step attenuator

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,639,100
App. No.
11/929,987
Granted
Dec 29, 2009
Kind
B2
Abstract

A broadband, high-speed RF step attenuator implemented using long-lifetime PIN diode switches is presented which provides step attenuation across a significant portion of the entire RF frequency spectrum while maintaining minimal insertion loss, return loss, and harmonics.

Claims (44)

1. A PIN diode switch having a switch input port and a switch output port, the switch configured to switch between a pass-through state connecting the switch input port to the switch output port and a high impedance state isolating the switch input port from the switch output port, the switch comprising:

at least two series-connected PIN diodes each characterized by a long carrier-recombination lifetime and having an anode and a cathode, the respective anodes of the series-connected PIN diodes each connected to the switch input port and the respective cathodes of the series-connected PIN diodes each connected to the switch output port;

at least two shunt-connected PIN diodes each characterized by a long carrier-recombination lifetime and having an anode and a cathode, the respective anodes of the shunt-connected PIN diodes connected to the respective cathodes of the series-connected PIN diodes and the respective cathodes of the shunt-connected PIN diodes connected to a circuit ground; and

a control port configured to receive a control signal, the control port connected to the respective cathodes of the series-connected PIN diodes and to the respective anodes of the shunt-connected PIN diodes, the control signal operating in either a first control signal state which places the at least two series-connected PIN diodes in a highly conductive state and the at least two shunt-connected PIN diodes in a non-conducting state to thereby conductively couple the switch input port to the switch output port, or a second control signal state which places the at least two series-connected PIN diodes in a non-conducting state and the at least two shunt-connected PIN diodes in a highly conductive state to thereby isolate the switch input port from the switch output port.

2. The switch of claim 1 , wherein each of the series-connected PIN diodes and the shunt-connected PIN diodes are characterized by a capacitance of less than 0.15 pF across the entire RF frequency spectrum.

3. The switch of claim 1 , wherein the switch input port is connected to a first section of a signal line of a transmission line and the switch output is connected to a second section of a signal line of the transmission line.

4. The PIN diode switch of claim 1 , wherein the at least two series-connected PIN diodes comprises exactly two series-connected PIN diodes connected in parallel with one another and in series between the input port and the output port, and the at least two shunt-connected PIN diodes exactly two shunt-connected PIN diodes respectively connected between the respective cathodes of the series-connected PIN diodes and the circuit ground.

5. A PIN diode switch having a switch input port, a first switch output port, and a second switch output port, the switch programmable by way of a control signal and a complement control signal to connect the switch input port to one or the other of the first switch output port and the second switch output port, the switch comprising:

a first set of at least two series-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the first set of series-connected long-lifetime PIN diodes connected to the switch input port and the respective cathodes of the first set of series-connected long-lifetime PIN diodes connected to the first switch output port;

a first set of at least two shunt-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the first set of shunt-connected long-lifetime PIN diodes connected to the respective cathodes of the first set of series-connected PIN diodes and the respective cathodes of the first set of shunt-connected long-lifetime PIN diodes connected to a circuit ground;

a second set of at least two series-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the second set of series-connected long-lifetime PIN diodes connected to the switch input port and the respective cathodes of the second set of series-connected long-lifetime PIN diodes connected the second switch output port;

a second set of at least two shunt-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the second set of shunt-connected long-lifetime PIN diodes connected to the respective cathodes of the second set of series-connected PIN diodes and the respective cathodes of the second set of shunt-connected long-lifetime PIN diodes connected to the circuit ground; and

the respective cathodes of the first set of series-connected long-lifetime PIN diodes and the respective anodes of the first set of shunt-connected long-lifetime PIN diodes connected for control by the control signal, and the respective cathodes of the second set of series-connected long-lifetime PIN diodes and the respective anodes of the second set of shunt-connected long-lifetime PIN diodes connected for control by the complement control signal.

6. The switch of claim 5 , wherein each of the PIN diodes in the first and second set of series connected long lifetime PIN diodes and the first and second sets of shunt-connected long lifetime PIN diodes are characterized by a capacitance of less than 0.15 pF across the entire RE frequency spectrum.

7. The switch of claim 5 , the switch input port connected to a grounded coplanar waveguide signal line, the first switch output port connected to a non-attenuated signal line path, and the second switch output port connected to an attenuated signal line path.

8. The PIN diode switch of claim 5 , wherein each set of the at least two series-connected PIN diodes comprises exactly two series-connected PIN diodes connected in parallel with one another and in series between the input port and the output port, and each set of the at least two shunt-connected PIN diodes exactly two shunt-connected PIN diodes respectively connected between the respective cathodes of the series-connected PIN diodes and the circuit ground.

9. A PIN diode switch having a first switch input port, a second switch input port, and a switch output port, the switch programmable by way of a control signal and a complement control signal to connect one or the other of the first switch input port and the second switch input port to the switch output port, the switch comprising:

a first set of at least two series-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the first set of series-connected long-lifetime PIN diodes each connected to the first switch input port and the respective cathodes of the first set of series-connected long-lifetime PIN diodes connected to the switch output port;

a first set of at least two shunt-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes connected to the respective cathodes of the first set of series-connected PIN diodes and the respective cathodes connected to a circuit ground;

a second set of at least two series-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes each connected to the second switch input port and the respective cathodes connected to the switch output port;

a second set of at least two shunt-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes connected to the respective cathodes of the of the second set of series-connected PIN diodes and the respective cathodes connected to the circuit ground; and

the respective cathodes of the first set of series-connected long-lifetime PIN diodes and the respective anodes of the first set of shunt-connected long-lifetime PIN diodes connected for control by the control signal, and the respective cathodes of the second set of series-connected long-lifetime PIN diodes and the respective anodes of the second set of shunt-connected long-lifetime PIN diodes connected for control by the complement control signal.

10. The switch of claim 9 , wherein each of the series connected long lifetime PIN diodes and the shunt-connected long lifetime PIN diodes are characterized by a capacitance of less than 0.15 pF across the entire RE frequency spectrum.

11. The switch of claim 9 , the switch input port connected to a grounded coplanar waveguide signal line, the first switch output port connected to a non-attenuated signal line path, and the second switch output port connected to an attenuated signal line path.

12. The PIN diode switch of claim 9 , wherein each set of the at least two series-connected PIN diodes comprises exactly two series-connected PIN diodes connected in parallel with one another and in series between the input port and the output port, and each set of the at least two shunt-connected PIN diodes exactly two shunt-connected PIN diodes respectively connected between the respective cathodes of the series-connected PIN diodes and the circuit ground.

13. An attenuation section, comprising:

a grounded coplanar waveguide, the coplanar waveguide comprising a ground, an input signal line, an output signal line, a first signal line path connectable between the input signal line and the output signal line, and a second signal line path connectable between the input signal line and the output signal line, the second signal line path having a higher attenuation than the first signal line path;

at least one control pod configured to provide a control signal and a complement of the control signal;

a first set of at least two series-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the first set of series-connected long-lifetime PIN diodes each connected to the signal line input and the respective cathodes of the first set of series-connected long-lifetime PIN diodes each connected to the first signal line path;

a first set of at least two shunt-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the first set of shunt-connected long-lifetime PIN diodes connected to the respective cathodes of the first set of series-connected long-lifetime PIN diodes and the respective cathodes of the first set of shunt-connected long-lifetime PIN diodes connected to the coplanar waveguide ground;

a second set of at least two series-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the second set of series-connected long-lifetime PIN diodes each connected to the signal line input and the respective cathodes of the second set of series-connected long-lifetime PIN diodes each connected the second signal line path;

a second set of at least two shunt-connected long-lifetime PIN diodes an anode and a cathode, the respective anodes of the second set of shunt-connected long-lifetime PIN diodes connected to the respective cathodes of the second set of series-connected long-lifetime PIN diodes and the respective cathodes of the second set of shunt-connected long-lifetime PIN diodes connected to the coplanar waveguide ground;

a third set of at least two series-connected long-lifetime PIN diodes each having an anode and a cathode, the respective anodes of the third set of series-connected long-lifetime PIN diodes each connected to the first signal line path and the respective cathodes of the third set of series-connected long-lifetime PIN diodes each connected to the output signal line;

a third set of at least two shunt-connected long-lifetime PIN diodes an anode and a cathode, the respective anodes of the third set of shunt-connected long-lifetime PIN diodes connected to the respective cathodes of the third set of series-connected long-lifetime PIN diodes and the respective cathodes of the third set of shunt-connected long-lifetime PIN diodes connected to the coplanar waveguide ground;

a fourth set of at least two series-connected long-lifetime PIN diodes an anode and a cathode, the respective anodes of the fourth set of series-connected long-lifetime PIN diodes each connected to the second signal line path and the respective cathodes of the fourth set of series-connected long-lifetime PIN diodes each connected to the output signal line;

a fourth set of at least two shunt-connected long-lifetime PIN diodes an anode and a cathode, the respective anodes of the fourth set of shunt-connected long-lifetime PIN diodes connected to the respective cathodes of the fourth set of series-connected long-lifetime PIN diodes and the respective cathodes of the fourth set of shunt-connected long-lifetime PIN diodes connected to the coplanar waveguide ground;

wherein each of the respective cathodes of the first set of series-connected long-lifetime PIN diodes, the respective anodes of the first set of shunt-connected long-lifetime PIN diodes, the respective cathodes of the third set of series-connected long-lifetime PIN diodes, and the respective anodes of the third set of shunt-connected long-lifetime PIN diodes are connected for control by the control signal; and

wherein each of the respective cathodes of the second set of series-connected long-lifetime PIN diodes, the respective anodes of the second set of shunt-connected long-lifetime PIN diodes, the respective cathodes of the fourth set of series-connected long-lifetime PIN diodes, the respective anodes of the fourth set of shunt-connected long-lifetime PIN diodes are connected for control by the complement control signal.

14. The attenuation section of claim 13 , wherein all of the PIN diodes are characterized by a capacitance of less than 0.15 pF across the entire RF frequency spectrum.

15. The attenuation section of claim 13 , connected in series with at least one additional attenuation pad of claim 1 to form a step attenuator circuit.

16. The attenuation section of claim 13 , wherein each set of the at least two series-connected PIN diodes comprises exactly two series-connected PIN diodes connected in parallel with one another and in series between the input port and the output port, and each set of the at least two shunt-connected PIN diodes exactly two shunt-connected PIN diodes respectively connected between the respective cathodes of the series-connected PIN diodes and the circuit ground.

17. The attenuation section of claim 13 , wherein the transmission media comprises a grounded coplanar waveguide.

18. The attenuation section of claim 17 , wherein the grounded coplanar waveguide is formed on a soft substrate material having a relative dielectric constant lower than at least 3.5.

19. The attenuation pad of claim 18 , the substrate material comprising ceramic/glass impregnated substrate material.

Assignments (4)
SECURITY INTEREST Recorded Mar 22, 2019
From: GIGA-TRONICS INCORPORATED
To: WESTERN ALLIANCE BANK, AN ARIZONA CORPORATION, AS SUCCESSOR IN INTEREST TO BRIDGE BANK, NATIONAL ASSOCIATION
Reel/Frame 048678/0594 →
SECURITY INTEREST Recorded Apr 27, 2017
From: GIGA-TRONICS INCORPORATED
To: PARTNERS FOR GROWTH V, L.P.
Reel/Frame 042170/0203 →
TERMINATION AND RELEASE OF SECURITY INTEREST AND PATENT COLLATERAL LIEN AND NOTICE Recorded Apr 19, 2017
From: SILICON VALLEY BANK
To: GIGA-TRONICS INCORPORATED; MICROSOURCE, INC.
Reel/Frame 042282/0718 →
SECURITY INTEREST Recorded Mar 16, 2014
From: GIGA-TRONICS INCORPORATED
To: PARTNERS FOR GROWTH IV, L.P.
Reel/Frame 032448/0810 →