IP Library Granted Patent US 8,081,114
Granted Patent B2
US 8,081,114 · App. 11/938,533 · Granted Dec 20, 2011

Strip-array antenna

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,081,114
App. No.
11/938,533
Granted
Dec 20, 2011
Kind
B2
Abstract

A representative embodiment of the invention provides an antenna having an electrically conducting ground plane and an array of electrically conducting strips located at an offset distance from the ground plane. Electrically conducting pathways, each attached to the middle portion of the corresponding strip, connect the strips to the ground plane. Electrically conducting lips, each attached to an edge of the corresponding conducting strip, extend about halfway toward the ground plane. The size of the array is smaller than the wavelength of the fundamental radiation mode supported by the antenna. Advantageously, the antenna has a bandwidth about three times larger than that of a comparably sized prior-art patch antenna.

Claims (23)

1. An antenna, comprising:

an electrically conducting surface;

an array having two or more electrically conducting strips located at an offset distance from the conducting surface, said two or more conducting strips separated from one another by one or more gaps, wherein a combined width of a conducting strip and an adjacent gap is smaller than a wavelength of a fundamental radiation mode of the antenna;

a plurality of conductors, each electrically connecting a corresponding conducting strip to the conducting surface;

a plurality of conducting lips, each attached to a corresponding strip and extending toward the conducting surface; and

a pair of conducting plates adapted to excite the fundamental radiation mode, when driven by a balanced current source, wherein:

said plates are located in an opening in one of said strips; and

an edge of at least one of said plates extends into a gap between said one strip and an adjacent strip beyond an edge of said one strip.

2. The invention of claim 1 , wherein the total width of the array is smaller than said wavelength.

3. The invention of claim 1 , wherein each of said conductors is a planar conducting pathway having a first edge attached to the corresponding conducting strip and a second edge attached to the conducting surface.

4. The invention of claim 1 , further comprising a solid dielectric substrate located between the conducting surface and the two or more conducting strips, wherein each of said conductors is a via in the dielectric substrate filled with an electrically conducting material.

5. The invention of claim 1 , wherein each of the conducting lips is attached to an edge of the corresponding strip.

6. The invention of claim 5 , wherein at least one of the strips has two of said conducting lips.

7. The invention of claim 5 , further comprising:

a plurality of planar conducting dividers, each attached to the conducting surface and extending toward a corresponding strip.

8. The invention of claim 7 , wherein:

each of said conducting lips extends toward the conducting surface by about one half of the offset distance; and

each of said conducting dividers extends toward the corresponding strip by about one half of the offset distance.

9. The invention of claim 1 , further comprising a circuit board having a dielectric substrate, wherein the conducting surface is attached to a first side of the substrate and the two or more conducting strips are attached to a second side of the substrate.

10. The invention of claim 1 , wherein:

the electrically conducting surface comprises first and second portions;

the two or more conducting strips are located at the offset distance from the first portion; and

the second portion is substantially coplanar with the two or more conducting strips.

Assignments (11)
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Jan 22, 2025
From: CACI LGS INNOVATIONS LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 069987/0444 →
CHANGE OF NAME Recorded Nov 4, 2024
From: LGS INNOVATIONS LLC
To: CACI LGS INNOVATIONS LLC
Reel/Frame 069292/0952 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded May 29, 2019
From: LGS INNOVATIONS LLC
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 049312/0843 →
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: BANK OF AMERICA, N.A.
To: LGS INNOVATIONS LLC
Reel/Frame 049247/0557 →
RELEASE OF SECURITY INTEREST Recorded May 2, 2019
From: BANK OF AMERICA, N.A.
To: LGS INNOVATIONS LLC
Reel/Frame 049074/0094 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Jul 19, 2017
From: LGS INNOVATIONS LLC
To: BANK OF AMERICA, N.A.
Reel/Frame 043254/0393 →
RELEASE OF SECURITY INTEREST Recorded Sep 30, 2014
From: CREDIT SUISSE AG
To: ALCATEL LUCENT
Reel/Frame 033868/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2014
From: ALCATEL LUCENT
To: LGS INNOVATIONS LLC
Reel/Frame 032743/0584 →
RELEASE OF SECURITY INTEREST Recorded Apr 1, 2014
From: CREDIT SUISSE AG
To: ALCATEL LUCENT
Reel/Frame 032578/0952 →
SECURITY INTEREST Recorded Apr 1, 2014
From: LGS INNOVATIONS LLC
To: BANK OF AMERICA NA
Reel/Frame 032579/0066 →
SECURITY AGREEMENT Recorded Jan 30, 2013
From: ALCATEL LUCENT
To: CREDIT SUISSE AG
Reel/Frame 029821/0001 →