IP Library Granted Patent US 8,140,949
Granted Patent B2
US 8,140,949 · App. 11/938,788 · Granted Mar 20, 2012

ACS unit of a Viterbi decoder and method for calculating a bit error rate before a Viterbi decoder

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,140,949
App. No.
11/938,788
Granted
Mar 20, 2012
Kind
B2
Abstract

An ACS unit of a Viterbi decoder and a method for calculating the bit error rate (BER) before Viterbi decoder are provided. The ACS unit includes a state calculator and a BER calculator. The state calculator calculates the state metric of a corresponding target state in the trellis diagram and selects one of two candidate source states as the selected source state of the target state. The state calculator also provides a selection signal indicating the selected source state. The BER calculator is coupled to the state calculator for providing the sum of the BER of the selected source state and the bit error count (BEC) of the transition from the selected source state to the target state as the BER of the target state.

Claims (35)

1. An ACS unit of a Viterbi decoder, comprising:

a state calculator for calculating a first sum of a first state metric of a first candidate source state and a first branch metric of a first transition from the first candidate source state to a target state, calculating a second sum of a second state metric of a second candidate source state and a second branch metric of a second transition from the second candidate source state to the target state, providing a selection signal indicating a selected source state which is the first candidate source state or the second candidate source state corresponding to the lesser one of the first sum and the second sum, and then providing the lesser sum as a target state metric of the target state; and

a BER calculator coupled to the state calculator for providing a third sum of a BER of the selected source state and a BEC of the transition from the selected source state to the target state as a BER of the target state.

2. The ACS unit of claim 1 , wherein the state calculator comprises:

a first adder for adding the first state metric and the first branch metric and providing the first sum;

a second adder for adding the second state metric and the second branch metric and providing the second sum;

a comparator coupled to the first adder and the second adder for providing the selection signal according to a comparison of the first sum and the second sum; and

a metric multiplexer coupled to the first adder, the second adder, and the comparator for outputting the lesser one of the first sum and the second sum as the target state metric according to the selection signal.

3. The ACS unit of claim 1 , wherein the BER calculator comprises:

a BER multiplexer coupled to the state calculator for receiving a BER of the first candidate source state and a BER of the second candidate source state and outputting the BER of the selected source state according to the selection signal;

a BEC multiplexer coupled to the state calculator for receiving a BEC of the first transition and a BEC of the second transition and outputting the BEC corresponding to the selected source state according to the selection signal; and

a third adder coupled to the BER multiplexer and the BEC multiplexer for adding the BER of the selected source state and the BEC corresponding to the selected source state and providing the third sum.

4. The ACS unit of claim 1 , wherein the Viterbi decoder is a hard decision Viterbi decoder.

5. The ACS unit of claim 1 , wherein the Viterbi decoder is a soft decision Viterbi decoder.

6. The ACS unit of claim 1 , wherein the Viterbi decoder comprises a plurality of ACS units, each of the ACS units calculates a BER for a corresponding target state; and the BERs of all the target states are stored in a storage element.

7. The ACS unit of claim 6 , wherein the Viterbi decoder periodically outputs the smallest BER among all the target states and then resets all the BERs to zero according to a predetermined period.

8. The ACS unit of claim 7 , wherein the predetermined period is equal to or longer than the traceback length of the Viterbi decoder.

9. A method for calculating a BER before a Viterbi decoder, comprising:

calculating a first sum of a first state metric of a first candidate source state and a first branch metric of a first transition from the first candidate source state to a target state;

calculating a second sum of a second state metric of a second candidate source state and a second branch metric of a second transition from the second candidate source state to the target state;

providing a selection signal indicating a selected source state which is the first candidate source state or the second candidate source state corresponding to the lesser one of the first sum and the second sum;

providing the lesser sum as a target state metric of the target state; and

providing a third sum of a BER of the selected source state and a BEC of the transition from the selected source state to the target state as a BER of the target state.

10. The method of claim 9 , wherein the step of providing the third sum comprises:

receiving a BER of the first candidate source state and a BER of the second candidate source state and outputting the BER of the selected source state according to the selection signal;

receiving a BEC of the first transition and a BEC of the second transition and outputting the BEC corresponding to the selected source state according to the selection signal; and

adding the BER of the selected source state and the BEC corresponding to the selected source state and providing the third sum.

11. The method of claim 9 , wherein the Viterbi decoder is a hard decision Viterbi decoder.

12. The method of claim 9 , wherein the Viterbi decoder is a soft decision Viterbi decoder.

13. The method of claim 9 , further comprising:

calculating a BER for each of a plurality of target states in a trellis diagram; and

storing the BERs of all the target states in a storage element.

14. The method of claim 13 , further comprising:

periodically outputting the smallest BER among all the target states and then resetting all the BERs to zero according to a predetermined period.

15. The method of claim 14 , wherein the predetermined period is equal to or longer than the traceback length of the Viterbi decoder.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2021
From: MEDIATEK INC.
To: XUESHAN TECHNOLOGIES INC.
Reel/Frame 055486/0870 →
MERGER Recorded Jun 8, 2020
From: MSTAR SEMICONDUCTOR, INC.
To: MEDIATEK INC.
Reel/Frame 052871/0833 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2016
From: ALPHA IMAGING TECHNOLOGY CORP.
To: MSTAR SEMICONDUCTOR, INC.
Reel/Frame 037401/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2008
From: TENOR ELECTRONICS CORPORATION
To: ALPHA IMAGING TECHNOLOGY CORP.
Reel/Frame 020908/0402 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 25, 2007
From: LI, SHU-MEI; CHANG, SZU-CHUNG
To: TENOR ELECTRONICS CORPORATION
Reel/Frame 020149/0978 →