Methods for forming III-V semiconductor device structures
View Patent ↗The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
1. A method for forming a structure, the method comprising:
forming a first semiconductor structure by forming a compositionally graded layer over a substrate;
forming a second semiconductor structure by bonding the first semiconductor structure to a handle structure; and
removing the substrate from the second semiconductor structure,
wherein the compositionally graded layer comprises at least one III-V compound, and the handle structure comprises a handle layer, the handle layer consisting essentially of a dielectric material.
2. The method of claim 1 , further comprising planarizing the first semiconductor structure prior to bonding.
3. The method of claim 1 , wherein forming the first semiconductor structure further comprises forming a compositionally uniform relaxed layer above the compositionally graded layer.
4. The method of claim 3 , wherein the compositionally uniform relaxed layer comprises at least one III-V compound.
5. The method of claim 1 , further comprising cleaning at least one of the first semiconductor structure and the handle structure by a wet chemical process prior to bonding.
6. The method of claim 1 , further comprising plasma activating at least one of the first semiconductor structure and the handle structure by a wet chemical process prior to bonding.
7. The method of claim 1 , further comprising fabricating a semiconductor device over the second semiconductor structure.
8. The method of claim 7 , wherein the semiconductor device comprises at least one transistor.
9. The method of claim 1 , wherein a bond strength of the second semiconductor structure is greater than approximately 1000 mJ/m 2 .
10. The method of claim 1 , wherein a bonding void density of the second semiconductor structure is less than approximately 0.3 voids/cm 2 .
11. The method of claim 1 , wherein the compositionally graded layer comprises at least one of GaAs, InGaAs, or AlGaAs.
12. The method of claim 1 , wherein the dielectric material comprises SiO 2 .
13. A method for forming a structure, the method comprising:
forming a first semiconductor structure by forming a compositionally graded layer over a substrate;
forming a second semiconductor structure by bonding the first semiconductor structure to a handle structure; and
removing the substrate from the second semiconductor structure,
wherein the compositionally graded layer comprises at least one III-V compound, and the handle structure comprises a bulk relaxed substrate consisting essentially of silicon.
14. The method of claim 13 , wherein the compositionally graded layer comprises at least one of GaAs, InGaAs, or AlGaAs.