Loop-back testing method and apparatus for IC

1. A test system for testing operability of integrated circuits, the test system comprising:

a first IC, for modulating a first signal to generate a first modulated signal and transmitting the first modulated signal, and for receiving a second modulated signal and demodulating the second modulated signal to generate a second signal;

a first loop antenna, coupled to the first IC, for receiving the first modulated signal and sending the first modulated signal back to the first IC as the second modulated signal; and

a tester circuit coupled to the first IC, for generating the first signal to the first IC, receiving the second signal from the first IC, and comparing the first signal and the second signal to determine the operability of the first IC.

2. The test system of claim 1 , further comprising:

a second IC, coupled to the first tester, for receiving the first signal, modulating the first signal to generate a third modulated signal and transmitting the third modulated signal, and for receiving a fourth modulated signal and demodulating the fourth modulated signal to generate a fourth signal; and

a second loop antenna, coupled to the second IC, for receiving the third modulated signal and sending the third modulated signal back to the second IC as the fourth modulated signal;

wherein the tester circuit receives the fourth signal from the second IC, and further compares the first signal with the fourth signal to determine operability of the second IC.

3. The test system of claim 2 , wherein the first IC and the second IC have different modulation indexes.

4. The test system of claim 1 , wherein the tester circuit compares the first signal with the second signal by comparing the number of transitions of the first signal and the second signal.

5. The test system of claim 1 , wherein the tester circuit compares the first signal with the second signal by comparing waveforms of the first signal and the second signal.

6. The test system of claim 1 , wherein the first IC is an RFID IC.

7. A method of determining operability of integrated circuits, the method comprising:

generating a first signal and sending the first signal to a first IC;

utilizing the first IC to modulate the first signal to generate a first modulated signal;

transmitting the first modulated signal to a first loop antenna;

utilizing the first loop antenna to send the first modulated signal back to the first IC as a second modulated signal;

utilizing the first IC to demodulate the second modulated signal to generate a second signal; and

comparing the first signal and the second signal to determine operability of the first IC.

8. The method of claim 7 , further comprising:

sending the first signal to a second IC;

utilizing the second IC to modulate the first signal to generate a third modulated signal;

transmitting the third modulated signal to a second loop antenna;

utilizing the second loop antenna to send the third modulated signal back to the second IC as a fourth modulated signal;

utilizing the second IC to demodulate the fourth modulated signal to generate a fourth signal; and

comparing the first signal and the fourth signal to determine operability of the second IC.

9. The method of claim 8 , wherein the first IC and the second IC have different modulation indexes.

10. The method of claim 7 , wherein the step of comparing the first signal and the second signal to determine operability of the first IC comprises:

comparing the number of transitions of the first signal and the second signal.

11. The method of claim 7 , wherein the step of comparing the first signal and the second signal to determine operability of the first IC comprises:

comparing waveforms of the first signal and the second signal.

12. The method of claim 7 , wherein the first IC is an RFID IC.